Imaging Driver Circuit Logic for Flexible Shutter Control
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Solution Overview
Problem
The existing imaging apparatus, as described in Japanese Patent Laid-Open No. 2010-57097, lacks the capability to handle various operations effectively, resulting in insufficient performance improvement.
Innovation Solution
The proposed imaging apparatus includes a pixel area with multiple pixel circuit groups, drivers, and an address decoder. Each driver consists of a first holding circuit, a second holding circuit, and a calculator, which receives logical values from the address decoder to generate driving signals for the pixel circuit groups, enabling improved operational flexibility and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a simple address decoder with series-connected memories is used, then the device complexity is reduced, but the adaptability and operational versatility are insufficient
Solution Approach 1:
The driver circuit is segmented into multiple functional blocks: first holding circuit (latch 901), second holding circuit (latch 902), and calculator circuit (92). Each block performs a specific function in the signal processing chain, allowing independent optimization and flexible configuration to achieve various operations while maintaining manageable complexity through modular design
Solution Approach 2:
The address decoder is designed with universal functionality to support multiple operations including electronic shutter scan and read-out scan. The decoder can interpret address signals in different modes and generate appropriate control signals for various imaging operations, making the system adaptable to diverse operational requirements without requiring separate dedicated circuits for each function
2Productivity
If multiple holding circuits and calculators are added to each driver, then the operational flexibility and performance are improved, but the device complexity increases
Solution Approach 1:
The first holding circuit (latch 901) performs preliminary action by latching the decoded signal from the address decoder before it reaches the second holding circuit and calculator. This preliminary latching prepares the signal in advance, enabling the calculator to perform complex logical operations without waiting for signal stabilization, thereby improving performance while organizing complexity in a structured temporal sequence
Solution Approach 2:
The first holding circuit acts as an intermediary between the address decoder and the second holding circuit/c calculator. It buffers and conditions the decoded signal, providing a stable intermediate state that facilitates subsequent processing. This intermediary function decouples the timing requirements of different circuit stages, improving overall system performance while managing signal flow complexity
3Productivity
If the address decoder supplies logical values to multiple drivers simultaneously, then the operational efficiency is improved, but the signal distribution complexity increases
Solution Approach 1:
Multiple drivers (9-0 to 9-n) are merged into a uniform structural template, each containing the same sequence of holding circuits and calculator. This merging allows the address decoder to supply logical values to all drivers simultaneously using the same signal distribution pattern, improving operational efficiency while reducing signal distribution complexity through repetition of a standardized configuration
Data Source
AI summary
An imaging apparatus includes a first holding circuit, a second holding circuit, and a calculator. The first holding circuit is configured to hold and output a logical value based on a logical value supplied from an address decoder. The second holding circuit is configured to hold and output a logical value based on the logical value output from the first holding circuit. The calculator is configured to receive the logical values supplied from the first and second holding circuits and perform a logical operation for generating a driving signal.