Solid-State Imaging Element Height Reduction via Copper Flat Pad
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Solution Overview
Problem
There is a demand to further reduce the height of solid-state imaging elements, as existing technologies have limitations in minimizing their height while maintaining performance and preventing foreign material attachment.
Innovation Solution
A solid-state imaging element with a wafer-level chip size package configuration, featuring a copper flat pad without a solder ball and an alloy layer, and a thermal expansion coefficient balance between the protective and rewiring layers, which reduces the overall height and eliminates the need for a cover glass, enhancing moisture resistance and foreign material prevention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a transparent adhesive is applied to all of a light receiving region and a peripheral circuit region with a transparent member placed and fixed, then moisture resistance is improved and foreign material attachment is prevented, but the height of the solid-state imaging element increases
Solution Approach 1:
The patent removes the cover glass component from the conventional structure, extracting the protective function to the peripheral circuit region only. This eliminates the need for a transparent adhesive layer across the entire surface, thereby reducing the overall height while maintaining moisture resistance where critical.
Solution Approach 2:
The patent segments the protective coverage area, applying transparent adhesive only to the peripheral circuit region rather than the entire surface including the light receiving region. This selective segmentation reduces the cumulative height of adhesive layers and cover glass while maintaining protection where needed.
2Object-affected harmful factors
If a cover glass and transparent adhesive are used to protect the light receiving surface, then foreign material attachment is prevented, but the device complexity and height increase
Solution Approach 1:
The patent extracts the cover glass component from the structure, removing the need for transparent adhesive over the light receiving region. Foreign material protection is maintained through alternative means such as peripheral sealing or localized protective structures, thereby simplifying the overall device structure.
Solution Approach 2:
Instead of protecting the light receiving surface with a cover glass from the front, the patent inverts the protective approach by focusing protection on the peripheral circuit region through adhesive application, allowing the light receiving region to remain exposed and optically functional.
3Reliability
If solder balls and alloy layers are formed on connection terminals, then electrical connection is ensured, but the height and manufacturing complexity increase
Solution Approach 1:
The patent removes the solder ball formation process from the manufacturing sequence, extracting this height-increasing feature while maintaining electrical connection reliability through alternative terminal structures such as flat pads or recessed contacts that achieve secure bonding without the additional height of spherical solder joints.
Solution Approach 2:
The patent changes the geometric parameter of the connection terminal from a spherical solder ball to a flat or planar structure. This parameter change reduces the height dimension while maintaining the essential electrical connection function through direct metal-to-metal contact or alternative bonding mechanisms.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces the height of the solid-state imaging element, improves moisture resistance, and prevents foreign material attachment, while maintaining performance and efficiency in signal transmission and image processing.
Implementation Method 1
a thermal expansion coefficient of the protective layer is substantially balanced with a thermal expansion coefficient of the rewiring layer
Data Source
AI summary
The height of a solid-state imaging element is further reduced as compared to the related art. A solid-state imaging element that is a wafer-level chip size package, including: an optical sensor chip; a protective layer that is stacked on a light receiving surface of the optical sensor chip; and a rewiring layer that is stacked on a surface opposite to the light receiving surface of the optical sensor chip, in which a connection terminal of the rewiring layer is a copper flat pad without a solder ball, an alloy layer of tin and copper is not formed on a front surface of the flat pad, and a thermal expansion coefficient of the protective layer is substantially balanced with a thermal expansion coefficient of the rewiring layer.