Solid-State Imaging Device Gate Contact Active Region
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Solution Overview
Problem
In MOS type solid-state imaging devices, reducing pixel size to achieve multiple pixels leads to a decrease in photo diode area, resulting in high optical shot noise and reduced saturation signals due to the necessity of forming transistor gate contacts on element isolating regions, which degrades the current drive capability and 'gm' of transistors.
Innovation Solution
Forming at least part of the gate contacts of transistors in the signal scanning circuit section on the active region of the transistor, allowing for a reduction in the size of the element isolating region and an increase in the photo diode area, thereby enhancing saturation signals and reducing optical shot noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If gate contacts are formed on element isolating regions, then transistor current drive capability is maintained, but photo diode area is reduced
Solution Approach 1:
The patent applies local quality by differentiating contact formation rules between signal detector section transistors and signal scanning circuit section transistors. Gate contacts for signal scanning circuit transistors are formed on active regions while maintaining proper electrical connection, whereas traditional logic circuits require contacts on isolating regions. This localized differentiation allows photo diode area expansion without compromising overall device reliability.
Solution Approach 2:
The patent inverts the conventional approach by forming gate contacts on active regions rather than on isolating regions. This inversion is specifically applied to signal scanning circuit section transistors, allowing the element isolating region to be reduced in size and enabling photo diode area expansion while maintaining acceptable transistor performance through alternative contact positioning.
2Productivity
If pixel size is reduced to achieve multiple pixels, then device integration is improved, but saturation signal decreases and optical shot noise increases
Solution Approach 1:
The patent changes the parameter of gate contact positioning from isolating regions to active regions for signal scanning circuit transistors. This parameter change enables element isolating region reduction, which directly increases photo diode area within the same pixel footprint, thereby maintaining saturation signal levels and reducing optical shot noise while achieving higher pixel integration density.
3Area of moving object
If element isolating region size is reduced, then photo diode area is expanded, but gate contact formation becomes more difficult
Solution Approach 1:
The patent resolves the manufacturing difficulty by transitioning from two-dimensional planar contact formation on isolating regions to three-dimensional contact formation on active regions. Gate contacts are formed on active regions at different vertical levels, utilizing the vertical dimension to accommodate contact structures while maintaining reduced element isolating region sizes and expanded photo diode areas.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables the expansion of the photo diode area, improving image quality by reducing optical shot noise and maintaining acceptable 'gm' and current drive capabilities, even with smaller pixel sizes.
Implementation Method 1
a photo diode for photoelectric conversion
Data Source
AI summary
A solid-state imaging device has an imaging region in which unit cells, each of which includes a photoelectric conversion section and a signal scanning circuit section, are disposed on a semiconductor substrate in a two-dimensional manner. The signal scanning circuit section is composed of a plurality of transistors. At least part of a gate contact of each transistor in the signal scanning circuit section is formed on an active region of each transistor.


