Solid-State Imaging Device Gate Insulation Thickness Optimization
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Solution Overview
Problem
MOS type solid-state imaging devices face challenges in reducing 1/f noise in amplification transistors and increasing saturated charge amounts due to micronization, which affects image quality and power consumption, especially in peripheral logic circuits.
Innovation Solution
The use of different thicknesses for gate insulation films in transistors within the pixel region and peripheral circuits, with thicker films for readout transistors and thinner films for amplification transistors, allows for reduced 1/f noise and increased saturated charge, while also enabling lower power consumption and smaller chip sizes by optimizing voltage applications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the pixel size is reduced to increase the number of pixels, then the resolution is improved, but the 1/f noise of the amplification transistor increases and the saturated charge amount decreases
Solution Approach 1:
The patent applies different gate insulation film thicknesses to different transistor types within the pixel: thick films for readout transistors to prevent afterimages, thin films for amplification transistors to reduce 1/f noise. This local differentiation resolves the contradiction by optimizing each transistor's performance for its specific function while maintaining overall pixel miniaturization.
Solution Approach 2:
The patent changes the gate insulation film thickness parameter based on transistor function. By using thin gate insulation films (e.g., 2-5 nm) specifically for amplification transistors, the 1/f noise is reduced, enabling high-resolution imaging with miniaturized pixels while maintaining low noise performance.
2Object-affected harmful factors
If the gate insulation film is thinned to reduce 1/f noise, then the noise performance is improved, but the withstand voltage decreases requiring higher precision manufacturing
Solution Approach 1:
The patent implements local quality by applying different gate insulation film thicknesses to different transistor regions. Thin films are applied only to amplification transistors where noise reduction is critical, while readout transistors receive thick films for voltage stability. This localized approach reduces the overall manufacturing precision burden compared to uniform thin-film fabrication.
Solution Approach 2:
The patent segments the gate insulation film fabrication into multiple steps with different thicknesses for different transistor types. This segmentation allows independent optimization of each transistor's gate insulation characteristics, reducing the cumulative manufacturing precision requirements while achieving both noise reduction and voltage stability.
3Object-affected harmful factors
If the n-type diffusion layer density is increased to prevent afterimages, then the afterimage is suppressed, but the photodiode potential is raised causing readout failure
Solution Approach 1:
The patent applies local quality by using thick gate insulation films specifically for readout transistors to ensure they can withstand the high potentials generated in the photodiode during signal charge transfer. This localized thick-film protection enables the use of high-density n-type diffusion layers for afterimage suppression without compromising readout reliability.
Solution Approach 2:
The thick gate insulation film on the readout transistor acts as an intermediary that protects the transistor from the high potential stress caused by high-density n-type diffusion layers. This intermediary protection mechanism allows the system to achieve both afterimage suppression and reliable signal charge readout simultaneously.
4Measurement precision
If the pixel area is reduced to increase pixel count, then the resolution is improved, but the maximum charge from each pixel decreases
Solution Approach 1:
The patent changes the gate insulation film thickness parameter to optimize transistor performance in miniaturized pixels. Thin gate insulation films in amplification transistors enable lower 1/f noise, allowing smaller pixels to maintain adequate signal quality and charge capacity despite reduced area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively suppresses 1/f noise, maintains high saturated charge amounts, lowers power consumption, and reduces chip size, thereby enhancing image quality and operational efficiency in MOS type solid-state imaging devices.
Implementation Method 1
a photodiode 11, for converting incident light into charge
Data Source
AI summary
In a solid-state imaging device, provided is a solid-state imaging device in which a first gate insulation film 22 for the readout transistor 12 in a pixel is formed so as to be thicker than a second gate insulation film 23 for an amplification transistor 14 in the pixel, and the second gate insulation film 23 for the amplification transistor 14 in the pixel is formed so as to be thicker than a third gate insulation film 24 for an n-type micro transistor 17 and a p-type micro transistor 18 in a peripheral region outside the pixel, whereby it is possible to suppress a 1/f noise of the amplification transistor 14 and also possible to increase a saturated charge amount.