Solid-State Imaging Device Pinning Layer Self-Alignment

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing solid-state imaging devices face issues with dark currents and afterimages due to misalignment of gate electrodes and differences in threshold voltages among pixel transistors, which are exacerbated by the cancellation of impurities forming the floating diffusion and pinning layers, leading to operational difficulties and increased leakage.

Innovation Solution

A solid-state imaging device is designed with a pinning layer of opposite conductivity type to the floating diffusion, formed shallower than the floating diffusion, and implanted using the gate electrode as a mask, ensuring self-alignment and accurate overlap with the gate electrode, thereby reducing dark currents and leakages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the gate electrodes are formed after the pinning layers and diffusion layers, then the manufacturing process follows conventional sequencing, but the gate electrodes become misaligned causing differences in threshold voltages among transistors

Engineering Contradiction:
Improveconventional process sequencingVSAvoidgate electrode alignment
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The pinning layer is formed in advance before the gate electrode, using the gate electrode position as a reference. This preliminary formation ensures that when the gate electrode is subsequently formed, the pinning layer is already positioned correctly, eliminating alignment issues that would occur if the gate electrode were formed first or simultaneously.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The gate electrode serves a dual function: as the functional component of the transistor and as a mask for forming the pinning layer. By using the gate electrode itself as the positioning reference (mask), the structure achieves self-alignment, eliminating the need for separate alignment processes and ensuring consistent positioning.

Inventive Principle:
Principle #25Self-service

2Object-affected harmful factors

If impurities forming the floating diffusion and pinning layers cancel each other, then dark currents and afterimages are reduced, but overlapping the diffusion layers and gate electrodes becomes more difficult

Engineering Contradiction:
Improvedark current and afterimage reductionVSAvoidoverlap control between diffusion layers and gate electrode
Core Design Contradiction:
Object-affected harmful factorsVSManufacturing precision

Solution Approach 1:

The gate electrode acts as an intermediary mask that mediates the formation of both the pinning layer and the floating diffusion layer. By using the gate electrode as the masking element for both impurity implantations, precise overlap control is achieved even when the impurities have opposing conductivity types and need to be formed in close proximity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The pinning layer is formed in advance before the floating diffusion layer, with both processes using the gate electrode as a mask. This sequential preliminary formation ensures that the shallower pinning layer is established first, providing a foundation for the subsequent floating diffusion layer formation, while maintaining precise spatial relationships through the common mask.

Inventive Principle:
Principle #10Preliminary action

3Object-affected harmful factors

If the amount of implanted impurities in forming the floating diffusion is reduced, then leakages in the floating diffusion are reduced, but overlapping the diffusion layers and gate electrodes becomes more difficult

Engineering Contradiction:
Improveleakage reduction in floating diffusionVSAvoidoverlap control between diffusion layers and gate electrode
Core Design Contradiction:
Object-affected harmful factorsVSManufacturing precision

Solution Approach 1:

The gate electrode serves as an intermediary mask that enables precise overlap control even when low doses of impurities are used. The mask provides a physical reference that ensures accurate positioning of the floating diffusion layer relative to the gate electrode, compensating for the reduced impurity amount that would otherwise make alignment more challenging.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration reduces dark currents, afterimages, and differences in threshold voltages among transistors, improving image quality by ensuring proper operation and reducing noise in both multilayer and surface-type image sensors.

Implementation Method 1

forming a pinning layer by implanting first impurities into the semiconductor substrate using the gate electrode as a mask; and forming a floating diffusion by implanting second impurities into the semiconductor substrate using the gate electrode as a mask

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

a photoelectric converter configured to photoelectrically convert incident light to generate signal charge

Methodology Applied
Scientific EffectPhotoelectric conversion: Photoelectric Effect

Data Source

PatentUS9887231B2Solid-state imaging device and method of manufacturing the device
Publication Date: 2018.02.06 PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO LTD
  • US9887231B2 patent drawing
  • US9887231B2 patent drawing
  • US9887231B2 patent drawing

AI summary

A solid-state imaging device includes unit pixels formed on a semiconductor substrate. Each of the unit pixels includes a photoelectric converter, a floating diffusion, a pinning layer, and a pixel transistor. The pixel transistor includes a gate electrode formed on the semiconductor substrate, a source diffusion layer, and a drain diffusion layer. At least one of the source diffusion layer or the drain diffusion layer functions as the floating diffusion. The pinning layer is covered by the floating diffusion at a bottom and a side at a channel of the pixel transistor. A conductivity type of the floating diffusion is opposite to that of the pinning layer.