Solid-State Imaging Pixel With P-Type Well For High Sensitivity
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Solution Overview
Problem
Existing solid-state imaging apparatuses struggle to achieve both high sensitivity and large saturation charge amount in their photoelectric conversion units, as current structures either prioritize sensitivity or saturation charge amount but not both effectively.
Innovation Solution
The proposed solid-state imaging apparatus incorporates a pixel structure with multiple semiconductor regions, including a P-type semiconductor region disposed below the N-type semiconductor region to increase PN junction capacitance, allowing for both high sensitivity and large saturation charge amount by optimizing the layout and manufacturing process to reduce costs and improve yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a P-type semiconductor region is disposed below the N-type semiconductor region to increase PN junction capacitance, then the saturation charge amount increases, but the sensitivity may be compromised
Solution Approach 1:
The patent extends the semiconductor structure into the depth dimension by disposing a P-type semiconductor region below the N-type semiconductor region. This vertical arrangement increases the PN junction capacitance and saturation charge amount without compromising the horizontal photoelectric conversion area, thus resolving the contradiction between saturation charge amount and sensitivity.
Solution Approach 2:
The patent divides the semiconductor structure into distinct functional regions: an N-type semiconductor region for photoelectric conversion and signal charge accumulation, and a P-type semiconductor region for increasing capacitance. This segmentation allows each region to optimize its specific function without interfering with the other, achieving both high sensitivity and large saturation charge amount.
2Measurement precision
If the photoelectric conversion unit structure is optimized for high sensitivity, then sensitivity improves, but saturation charge amount is reduced
Solution Approach 1:
The patent utilizes the vertical dimension by placing the P-type semiconductor region below the N-type semiconductor region. This allows the photoelectric conversion surface to remain optimized for sensitivity while the underlying P-type region contributes to increased capacitance and saturation charge amount through the extended PN junction.
Solution Approach 2:
The P-type semiconductor region is nested below the N-type semiconductor region, creating a layered structure where the N-type region performs photoelectric conversion and the P-type region provides capacitance enhancement. This nested arrangement allows both functions to coexist without spatial conflict.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the sensitivity and saturation charge capacity of the photoelectric conversion units, improving the overall performance of the imaging apparatus while reducing manufacturing complexity and costs.
Implementation Method 1
The N-type substrate structure is such a structure that a P-type semiconductor region is provided at a deep portion in the N-type semiconductor substrate having low impurity concentration and the photoelectric conversion unit is disposed within an N-type semiconductor region on the substrate surface portion, which is electrically isolated from the deep portion of the substrate. The N-type substrate structure is characterized by its high sensitivity because signal charge generated in the N-type semiconductor region can be easily collected due to drift.
Implementation Method 2
The P-type well structure is characterized by its large saturation charge amount because a PN junction capacitor is formed between the N-type semiconductor region serving as the charge accumulation region and the P-type well.
Data Source
AI summary
A solid-state imaging apparatus includes first, second, and third semiconductor regions. The third semiconductor region has a second conductivity type. The third semiconductor region extends from a region below the second semiconductor region of a first pixel to a region below the second semiconductor region of a second pixel in the first and second pixels adjacent to each other among a plurality of pixels.