Solid State Imaging Device Pixel Structure for High Sensitivity

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Solution Overview

Problem

Current solid state imaging devices face challenges with mixed color, residual images, dark current, and noise, while striving for high sensitivity and pixel density, due to structural limitations such as the absorption of blue-wavelength light by polysilicon layers and the need for additional regions like transfer gates and floating diodes that hinder pixel density.

Innovation Solution

A solid state imaging device is designed with a specific pixel structure that includes a photodiode and a junction transistor, where the conductor electrode is made of a light-blocking material, preventing light leakage and allowing direct entry of incident light, and a field effect transistor with a gate conductor layer, enabling efficient signal charge accumulation and transfer without the need for additional regions, thus enhancing sensitivity and pixel density.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Illumination intensity

If a photogate PG conductor layer is used to accumulate signal charges, then signal charge accumulation is achieved, but blue-wavelength light is absorbed by the polysilicon layer reducing sensitivity

Engineering Contradiction:
Improveblue-wavelength light sensitivityVSAvoidsignal charge accumulation capability
Core Design Contradiction:
Illumination intensityVSReliability

Solution Approach 1:

The patent extracts and removes the photogate conductor layer from the optical path by forming the signal charge accumulation region directly in the semiconductor substrate. This eliminates the polysilicon layer that absorbs blue light, allowing incident blue-wavelength light to reach the accumulation region without attenuation while maintaining signal charge accumulation capability through the substrate's potential well structure.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If transfer gate TG and floating diode FD are added to transfer and amplify signal charges, then signal amplification is achieved, but pixel density is reduced due to additional regions

Engineering Contradiction:
Improvesignal amplification capabilityVSAvoidpixel density
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent merges the signal charge accumulation region and the first transistor into a single integrated structure where the accumulation region serves dual purposes: storing signal charges and functioning as the transistor gate electrode. This integration eliminates the need for separate transfer gates and floating diodes, reducing the number of components per pixel while maintaining signal amplification capability through the transistor's gate-controlled current flow.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The signal charge accumulation region is designed to perform multiple functions simultaneously: it accumulates signal charges generated by incident light, serves as the gate electrode for the first transistor to control signal current flow, and acts as the control element for signal readout. This multi-functionality reduces the need for additional dedicated components, thereby increasing pixel density.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Ease of operation

If additional regions like transfer gate and floating diode are provided, then signal charge transfer is enabled, but device complexity increases

Engineering Contradiction:
Improvesignal charge transfer capabilityVSAvoidpixel structure complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent removes the transfer gate component from the pixel structure by enabling direct transfer of signal charges from the accumulation region to the transistor channel through potential control. This extraction of the transfer gate function simplifies the pixel structure while maintaining the capability to transfer signal charges efficiently through the substrate's electric field control.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent combines the functions of signal charge accumulation, storage, and transfer into a single integrated accumulation region that directly interfaces with the transistor. This merging eliminates the need for separate transfer gate structures and reduces the number of interfaces and control mechanisms required, thereby simplifying the overall device structure.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively reduces mixed color, residual images, and noise, while maintaining high sensitivity and achieving higher pixel density by preventing light absorption and leakage, thereby improving image quality and resolution.

Implementation Method 1

means for accumulating a signal charge in the diode, the signal charge generated in the pixel by irradiation of electromagnetic energy wave

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Implementation Method 2

the conductor electrode is made of a light-blocking material, preventing light leakage and allowing direct entry of incident light

Methodology Applied
Scientific EffectLight absorption: Absorption (EM radiation)

Data Source

PatentUS8487357B2Solid state imaging device having high sensitivity and high pixel density
Publication Date: 2013.07.16 UNISANTIS ELECTRONICS SINGAPORE PTE LTD
  • US8487357B2 patent drawing
  • US8487357B2 patent drawing
  • US8487357B2 patent drawing

AI summary

Each pixel of a solid state imaging device comprises: a first semiconductor layer; a second semiconductor layer; a third semiconductor layer and fourth semiconductor layer formed on the lateral side of the upper region of the second layer not to be in contact with the top surface of the second semiconductor layer; a gate conductor layer formed on the lower side of the second semiconductor layer; a conductor electrode formed on the side of the fourth semiconductor layer via an insulating film; and a fifth semiconductor layer formed on the top surface of the second semiconductor layer, wherein at least the third semiconductor layer, upper region of the second semiconductor layer, fourth semiconductor layer, and fifth semiconductor layer are formed in the shape of an island. A specific voltage is applied to the conductor electrode to accumulate holes in the surface region of the fourth semiconductor layer.