Solid-State Imaging Device Pixel Size Reduction via Shared Impurity Regions

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Solution Overview

Problem

Existing solid-state imaging devices face challenges in reducing pixel size while preventing malfunction from excessive light, as protection circuits increase pixel size and there is no consideration for size reduction in previous configurations.

Innovation Solution

A stack type solid-state imaging device is designed with a photoelectric conversion portion above a semiconductor substrate, where a bias voltage moves holes to a pixel electrode, and a protection circuit with impurity regions in the semiconductor substrate prevents potential overload, sharing impurity regions between adjacent pixels to reduce pixel size.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a protection circuit is provided in the signal reading circuit to prevent breakdown from excessive light, then reliability is improved, but pixel size increases

Engineering Contradiction:
Improveprotection from excessive lightVSAvoidpixel size
Core Design Contradiction:
ReliabilityVSArea of moving object

Solution Approach 1:

The protection circuit and output transistor share common impurity regions (source/drain regions) in the semiconductor substrate. By merging these regions, the protection circuit is implemented without requiring additional dedicated impurity regions, thereby preventing pixel size increase while maintaining protection functionality.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The impurity regions serve dual purposes: they function as source/drain regions for the output transistor and simultaneously as impurity regions for the protection circuit. This multi-functionality allows the protection circuit to be integrated without increasing pixel area.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If the number of pixels is increased to support higher sensitivity, then imaging capability is improved, but pixel size must be reduced

Engineering Contradiction:
Improvenumber of pixelsVSAvoidpixel size
Core Design Contradiction:
ProductivityVSArea of moving object

Solution Approach 1:

Adjacent pixels share common impurity regions for their respective output transistors and protection circuits. This merging reduces the total area required per pixel, enabling higher pixel density while maintaining full protection circuit functionality.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent transitions from dedicating separate impurity regions to sharing them across pixels, effectively utilizing the substrate area more efficiently and reducing the footprint per pixel.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution allows for a solid-state imaging device that prevents malfunction from excessive light and reduces pixel size, enabling increased pixel density without increasing pixel size, thus enhancing imaging capabilities.

Implementation Method 1

a photoelectric conversion layer stack type solid-state imaging device in which a photoelectric conversion portion including a pair of electrodes and a photoelectric conversion layer sandwiched between the pair of electrodes is provided above a silicon substrate so that electric charges generated in the photoelectric conversion layer

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Implementation Method 2

a bias voltage higher than a power supply voltage of the signal reading circuit is applied to the counter electrode so that holes of the electric charges generated in the photoelectric conversion layer move to the pixel electrode

Methodology Applied
Scientific EffectElectric field: Electric Field

Data Source

PatentUS9143713B2Solid-state imaging device and imaging apparatus
Publication Date: 2015.09.22 FUJIFILM CORP
  • US9143713B2 patent drawing
  • US9143713B2 patent drawing
  • US9143713B2 patent drawing

AI summary

The invention is directed to a solid-state imaging device in which pixels each including a photoelectric conversion portion formed above a semiconductor substrate and an MOS type signal reading circuit as defined herein are arranged in an array form, wherein: the photoelectric conversion portion includes a pixel electrode, a counter electrode and a photoelectric conversion layer as defined herein; a bias voltage is applied to the counter electrode as defined herein; the signal reading circuit includes a charge storage portion, an output transistor and a protection circuit as defined herein; the protection circuit has an impurity region as defined herein; the output transistor has an impurity region as defined herein; and the impurity regions of the protection circuits and the impurity regions of the output transistors are used in common to every adjacent two of the pixels as defined herein.