Imaging Apparatus Punch-Through Prevention Layer Design

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Solution Overview

Problem

Existing imaging apparatuses face challenges in efficiently transferring electric charges from the charge holding unit to the floating diffusion unit, leading to punch-through issues and decreased image quality due to noise such as dark current and reduced charge transfer efficiency.

Innovation Solution

Incorporating a punch-through prevention layer of a second conductivity type between the charge holding unit and the floating diffusion unit, along with a transfer assistance layer of the first conductivity type, to prevent leakage and enhance charge transfer efficiency, while using counter-doping to maintain transfer characteristics.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a punch-through prevention layer is added between the charge holding unit and floating diffusion unit, then noise is reduced and charge transfer efficiency is improved, but device complexity and manufacturing process complexity increase

Engineering Contradiction:
Improvecharge transfer efficiencyVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A punch-through prevention layer is introduced as an intermediary structure between the charge holding unit and floating diffusion unit. This layer prevents direct charge transfer (punch-through) between these units, thereby reducing noise and improving charge transfer efficiency. The intermediary layer acts as a barrier that controls charge flow paths.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The punch-through prevention layer is selectively positioned only in specific regions where charge leakage occurs, rather than uniformly across the entire device. This localized approach improves charge transfer efficiency at critical interfaces while minimizing overall device complexity and manufacturing burden.

Inventive Principle:
Principle #3Local quality

2Reliability

If counter-doping is performed to maintain transfer characteristics, then charge transfer efficiency is maintained, but manufacturing process complexity and time increase

Engineering Contradiction:
Improvecharge transfer efficiencyVSAvoidmanufacturing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

Counter-doping is performed during the manufacturing process to pre-establish the appropriate conductivity distribution in the punch-through prevention layer. This preliminary action ensures that the layer has the correct electrical characteristics before final device assembly, maintaining charge transfer efficiency while optimizing the manufacturing timeline.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If implantation energy is reduced for the second impurity, then transfer characteristics are maintained, but manufacturing precision requirements increase

Engineering Contradiction:
Improvetransfer characteristicsVSAvoidimplantation precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The implantation energy for the second impurity is specifically reduced compared to conventional processes. This parameter change allows the punch-through prevention layer to maintain appropriate transfer characteristics by creating a more gradual doping profile, which reduces abrupt junction effects and maintains charge transfer efficiency.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively reduces noise, improves charge transfer efficiency, and increases the saturation charge quantity, resulting in enhanced image quality and reduced power consumption.

Implementation Method 1

The method includes forming the punch-through prevention layer by implanting a first impurity into a semiconductor substrate with first implantation energy, with use of a first mask having a first opening, and implanting a second impurity corresponding to a conductivity type different from a conductivity type of the first impurity into the semiconductor substrate with second implantation energy lower than the first implantation energy, with use of the first mask.

Methodology Applied
Scientific EffectCounter-doping:

Implementation Method 2

a transfer assistance layer of the first conductivity type, the transfer assistance layer being disposed between the punch-through prevention layer and a surface of a semiconductor substrate

Methodology Applied
Scientific EffectCharge transfer:

Implementation Method 3

a photoelectric conversion unit of a first conductivity type, a charge holding unit of the first conductivity type, the charge holding unit being configured to hold electric charges transferred from the photoelectric conversion unit

Methodology Applied
Scientific EffectPhotoelectric conversion: Photoelectric Effect

Data Source

PatentUS10896922B2Imaging apparatus, imaging system, moving object, and method for manufacturing imaging apparatus
Publication Date: 2021.01.19 CANON KK
  • US10896922B2 patent drawing
  • US10896922B2 patent drawing
  • US10896922B2 patent drawing

AI summary

An imaging apparatus includes a photoelectric conversion unit of a first conductivity type, a charge holding unit of the first conductivity type, the charge holding unit being configured to hold electric charges transferred from the photoelectric conversion unit, a floating diffusion unit of the first conductivity type, the floating diffusion unit being configured to receive electric charges transferred from the charge holding unit, a punch-through prevention layer of a second conductivity type, the punch-through prevention layer being disposed between the charge holding unit and the floating diffusion unit to contact the floating diffusion unit, and a transfer assistance layer of the first conductivity type, the transfer assistance layer being disposed between the punch-through prevention layer and a surface of a semiconductor substrate.