Solid-State Imaging Device Read Control Circuit Noise Reduction

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Solution Overview

Problem

CMOS-type solid-state imaging devices with global shutter function face challenges in maintaining signal quality due to noise during the waiting period before signal charges are read, and existing configurations require complex control signal transmission across substrates, potentially increasing chip area and noise susceptibility.

Innovation Solution

A solid-state imaging device with substrates electrically connected via connectors, featuring a read control circuit that includes a pulse generation unit, selection unit, and logical units on both substrates to control and drive pixel elements, allowing for simultaneous or sequential exposure and reading of signals across rows, thereby reducing noise and chip area complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Extent of automation

If signal charges are stored in storage capacitors during a waiting period before reading, then simultaneous exposure of all pixels can be achieved, but noise during the waiting period deteriorates signal quality

Engineering Contradiction:
Improveglobal shutter functionVSAvoidsignal quality
Core Design Contradiction:
Extent of automationVSReliability

Solution Approach 1:

The invention divides the pixel array into multiple banks, with each bank having its own storage capacitors and readout circuitry. This segmentation allows different banks to be read out at different times, reducing the waiting period for each bank and thereby minimizing noise accumulation while maintaining the global shutter function.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The invention implements preliminary transfer of signal charges from photodiodes to storage capacitors for all pixels simultaneously, then sequentially reads out from different banks. This preliminary action ensures global exposure timing is achieved while the sequential readout reduces the duration of noise exposure during the waiting period.

Inventive Principle:
Principle #10Preliminary action

2Area of stationary object

If pixels are distributed between two substrates to reduce chip area, then chip area is reduced, but complex control signal transmission across substrates increases device complexity

Engineering Contradiction:
Improvechip areaVSAvoidcontrol signal transmission
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The invention combines multiple pixel banks on a single substrate, eliminating the need for inter-substrate connections and complex control signal transmission. This merging approach maintains reduced chip area benefits while simplifying the device structure by removing the second substrate and associated connection complexity.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables efficient control of signal reading and exposure timing, reducing noise and chip area requirements, while maintaining high signal quality by dividing read control circuit elements between substrates and using connectors for signal transmission.

Implementation Method 1

a photoelectric conversion element that is disposed in the first substrate and generates a signal according to an amount of incident light

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Data Source

PatentUS9059056B2Solid-state imaging device and imaging device
Publication Date: 2015.06.16 OLYMPUS CORPORATION(JP)
  • US9059056B2 patent drawing
  • US9059056B2 patent drawing
  • US9059056B2 patent drawing

AI summary

A solid-state imaging device and an imaging device are capable of transferring a control signal to pixels formed in each chip of the solid-state imaging device, in which the plurality of chips are connected to each other, without an increase in a circuit size of the solid-state imaging device or an increase in the number of connectors between the chips. The solid-state imaging device, in which first and second substrates are electrically connected to each other via the connectors, includes a pixel unit in which a plurality of pixels each including a photoelectric conversion element disposed in the first substrate and a reading circuit disposed in the second substrate are arrayed two-dimensionally, and a read control circuit that controls reading of a signal from the pixels. The read control circuit includes a pulse generation unit and a logical unit.