Solid-State Imaging Readout With Successive Transfer Pulse Sampling

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Solution Overview

Problem

Conventional solid-state imaging apparatuses of the CMOS type face difficulties in increasing frame rate due to correlated double sampling (CDS) processing, which requires two samplings for noise removal, limiting the efficiency of radiation detection systems.

Innovation Solution

A solid-state imaging apparatus with a photoelectric conversion element, transfer transistor, reset transistor, amplifier transistor, converter circuit, and drive circuit that allows successive sampling of pixel signals by omitting the reset period, enabling increased frame rate through optimized pulse output sequences for the reset and transfer transistors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If correlated double sampling (CDS) processing is performed for noise removal, then measurement precision is improved, but productivity deteriorates due to requiring two samplings per readout

Engineering Contradiction:
Improvenoise removalVSAvoidframe rate
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The patent divides the pixel array into multiple independent regions, each with its own readout circuitry. This segmentation allows parallel readout of multiple regions, effectively multiplying the frame rate while maintaining CDS processing within each region for noise removal.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a spatial dimension to the sampling process by using multiple pixel arrays arranged in different directions or planes. This allows simultaneous sampling from multiple dimensions, increasing the effective frame rate while preserving noise removal capabilities through CDS processing within each dimensional slice.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Measurement precision

If two samplings are performed for one readout, then measurement precision is improved through noise removal, but loss of time increases

Engineering Contradiction:
Improvenoise removalVSAvoidreadout time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

By segmenting the pixel array into multiple regions with independent readout circuits, the patent enables parallel processing of multiple regions. This reduces the total readout time while maintaining dual-sampling CDS processing within each segment for noise removal.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements continuous readout operations across multiple pixel arrays by eliminating idle periods between samplings. While one region is being read out, other regions continue accumulating charge, ensuring that the useful action of radiation detection continues without interruption, thereby reducing overall readout time while maintaining precision.

Inventive Principle:
Principle #20Continuity of useful action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration enables successive sampling of pixel signals without the need for repeated reset operations, thereby increasing the frame rate and improving the efficiency of radiation detection systems.

Implementation Method 1

a photoelectric conversion element that converts an incident photon into charge

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Data Source

PatentUS11785175B2Solid-state imaging apparatus, radiation detector, and radiation measurement system
Publication Date: 2023.10.10 SONY SEMICON SOLUTIONS CORP
  • US11785175B2 patent drawing
  • US11785175B2 patent drawing
  • US11785175B2 patent drawing

AI summary

A solid-state imaging apparatus includes a photoelectric conversion element, a transfer transistor, a reset transistor, an amplifier transistor, a converter circuit that converts an analog voltage appearing at a vertical signal line into a digital voltage value, a first signal line that is connected to the gate of the reset transistor, a second signal line that is connected to the gate of the transfer transistor, and a drive circuit that outputs to the first signal line a reset pulse for causing the reset transistor to discharge charge in a charge accumulation portion, and outputs to the second signal line a transfer pulse for causing the transfer transistor to transfer charge generated in the photoelectric conversion element to the charge accumulation portion. The drive circuit outputs the reset pulse to the first signal line, and then outputs the transfer pulse to the second signal line successively in two or more times.