Imaging Device Reference Signal Generator for High-Speed Nondestructive Reading
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Solution Overview
Problem
Conventional imaging devices with large capacity vertical signal lines require long times for reset charge and discharge, leading to slow reading operations due to the use of integrators with switched capacitors, especially when dealing with dark signals.
Innovation Solution
The imaging device employs a reference-signal generation section that generates a reset signal independently of the pixel signal, allowing the signal retention section to retain a differential signal without needing to charge and discharge the vertical signal line, using a configuration where the reference-signal generation section is similar to the pixel's source follower circuit, enabling high-speed and nondestructive reading.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional integrators with switched capacitors are used for signal processing, then signal integration can be performed, but processing time increases significantly due to long reset charge and discharge times of large capacity vertical signal lines
Solution Approach 1:
The patent segments the signal processing function from the vertical signal line by introducing a retention circuit that copies and holds the pixel signal. This separation allows the vertical signal line to be reset independently without waiting for complete signal processing, thereby reducing the processing time while maintaining integration accuracy through the retention circuit's controlled discharge.
Solution Approach 2:
The retention circuit acts as an intermediary between the pixel signal source and the integration circuit. It receives the pixel signal, holds it temporarily, and then discharges it to the integration circuit at a controlled rate. This intermediary function decouples the fast reset requirement from the slow integration process, resolving the time conflict.
2Device complexity
If the vertical signal line is used for both pixel signal transmission and reset signal charging, then the existing circuit structure can be maintained, but the large capacity of the vertical signal line causes slow reset operation
Solution Approach 1:
The patent extracts the reset signal charging function from the vertical signal line by introducing a dedicated retention circuit. The retention circuit has its own smaller capacity storage element that is charged during the reset period and then discharged to the integration circuit. This extraction allows the vertical signal line to be quickly reset while the retention circuit handles the signal transfer at a controlled pace.
3Measurement precision
If integration circuits are used to process pixel signals, then signal integration can be performed, but the reading operation becomes destructive and requires long processing times especially for dark signals
Solution Approach 1:
The retention circuit performs preliminary action by copying and holding the pixel signal before it reaches the integration circuit. This preliminary storage allows the integration process to proceed without immediately consuming the original pixel signal, enabling nondestructive reading. The retention circuit can maintain the signal while the integration operates, thus improving reading speed without sacrificing accuracy.
Data Source
AI summary
An imaging device comprising: a pixel array that includes pixels arranged in rows and columns, each of the pixels outputting a pixel signal; vertical signal lines each of which is provided for each of the columns; a reference-signal generator that generates a reset signal corresponding to a reset voltage of the pixels; a signal processor that outputs a differential signal corresponding to a difference between the pixel signal and the reset signal; a first switch that is connected between one of the vertical signal lines and the signal processor, the first switch switching between input and interruption of the pixel signal from each of the pixels to the signal processor; and a second switch that is connected between the reference-signal generator and the signal processor, the second switch switching between input and interruption of the reset signal from the reference-signal generator to the signal processor.