Imaging Sensor Phase-to-Binary Conversion for Faster Pixel Readout
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Solution Overview
Problem
Conventional solid-state imaging devices require a long time to convert phase information to binary values due to the need for multiple pulses, which limits their speed and precision, especially as the number of pixels and bit width increases.
Innovation Solution
The device includes a first converter for upper bits and a second converter for lower bits, with a conversion circuit that converts phase information to binary values without using pulse strings, and an adder that enables repeated addition with two latch circuits, reducing circuit size and increasing processing speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If phase information is converted to binary value using pulse string method, then conversion accuracy is achieved, but conversion time increases significantly
Solution Approach 1:
The patent extracts the essential function of phase-to-binary conversion from the pulse string method and implements it through a dedicated conversion circuit that directly converts phase information to binary values without requiring multiple pulses, thereby achieving accurate conversion in a single operation
Solution Approach 2:
The patent replaces the mechanical pulse-based conversion system with an electronic conversion circuit that performs phase-to-binary conversion through electronic signal processing, eliminating the time-consuming sequential pulse operations
2Measurement precision
If multiple pulses are used for phase to binary conversion, then conversion precision is maintained, but circuit complexity increases
Solution Approach 1:
The patent extracts the core conversion function into a dedicated conversion circuit that handles phase-to-binary transformation in a single step, removing the need for complex multi-pulse control logic and associated circuitry
Solution Approach 2:
The conversion circuit is designed to perform multiple functions: it converts phase information to binary values, generates appropriate control signals, and interfaces with both the latch circuit and adder, thereby simplifying the overall system architecture
3Measurement precision
If conventional pulse-based conversion is used, then binary value accuracy is achieved, but processing speed decreases
Solution Approach 1:
The latch circuit preliminarily captures and holds the phase information at the appropriate moment, preparing it for immediate conversion to binary values by the conversion circuit, thereby enabling high-speed accurate conversion without sequential pulse delays
Solution Approach 2:
The patent replaces the mechanical sequential pulse counting system with an electronic conversion circuit that performs parallel phase-to-binary conversion, achieving both high speed and high accuracy through electronic signal processing
4Productivity
If circuit size is increased to handle more pixels and higher bit widths, then processing capability improves, but device area increases
Solution Approach 1:
The adder is designed to universally handle addition operations for pixel data accumulation across different bit widths and pixel counts, allowing the same circuit to scale with increased processing requirements without proportionally increasing device area
Solution Approach 2:
The patent enables the circuit to adapt to different processing requirements by changing operational parameters such as bit width and pixel count, allowing the same physical circuit to handle varying loads efficiently without requiring additional hardware for each configuration
Data Source
AI summary
A solid-state imaging device includes a first converter which converts an analog signal representing a pixel value to an upper bit of a digital signal, and a second converter which converts the analog signal to a lower bit of the digital signal. The second converter includes a first latch circuit which latches, as phase information, a plurality of clock signals having different phases upon conversion to the upper bit in the first converter, a conversion circuit which generates the lower bit of the digital signal by converting the phase information to a binary value, and an adder, and a second latch circuit which latches an addition result of the adder. The adder adds the binary value converted by the conversion circuit and a value latched by the second latch circuit.