Solid State Imaging Device Shielding Wiring for Capacitance Coupling

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Solution Overview

Problem

In back illumination type CMOS solid state imaging devices, miniaturization of pixel size leads to increased capacitance coupling between wiring lines, causing potential changes in the transfer gate, which results in decreased saturation signal amount and increased variation, affecting imaging characteristics.

Innovation Solution

The implementation of parallel wiring lines adjacent to transfer wiring lines, supplied with pulse or constant voltages, to equalize coupling capacitances and suppress potential changes in the transfer gate electrodes during pixel driving periods.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If pixel size is miniaturized to increase pixel density, then productivity and resolution are improved, but capacitance coupling between wiring lines increases causing potential changes in transfer gate and deterioration of saturation signal amount

Engineering Contradiction:
Improvepixel densityVSAvoidsaturation signal amount uniformity
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent introduces a shielding wiring line as an intermediary element positioned between adjacent transfer wiring lines. This shielding wiring line acts as a mediator that blocks the capacitive coupling between neighboring transfer wiring lines, thereby preventing potential changes in the transfer gate that would otherwise occur due to miniaturization. The shielding wiring line is connected to a fixed potential (ground or power supply) to effectively cancel out the capacitive interference.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent extracts and separates the shielding function from the transfer wiring lines by introducing a dedicated shielding wiring line. This allows the transfer wiring lines to focus on their primary function of transferring pixel signals while the shielding wiring line专门 handles the capacitive coupling issue. The shielding wiring line is taken out as a distinct element with its own potential control, enabling independent optimization of signal transfer and interference shielding.

Inventive Principle:
Principle #2Taking out (Extraction)

2Ease of manufacture

If wiring lines are disposed to pass over photodiodes in back illumination type to increase layout freedom, then ease of manufacture is improved, but capacitance coupling between wiring lines increases causing variation in saturation signal amount

Engineering Contradiction:
Improvelayout freedomVSAvoidsaturation signal amount consistency
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The shielding wiring line serves as an intermediary that decouples the relationship between transfer wiring lines and photodiodes. Even though transfer wiring lines are allowed to pass over photodiodes for layout freedom, the shielding wiring line positioned between adjacent transfer wiring lines prevents capacitive coupling from affecting the transfer gate potential, thereby maintaining saturation signal amount consistency despite the overhead routing.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The shielding wiring line is connected to a fixed potential (ground or power supply) to create an equipotential region between adjacent transfer wiring lines. This equipotential shielding prevents potential changes in the transfer gate that would otherwise be induced by capacitive coupling, ensuring that the saturation signal amount remains consistent across all pixels regardless of the wiring line routing over photodiodes.

Inventive Principle:
Principle #12Equipotentiality

3Productivity

If interval between transfer wiring lines is narrowed to reduce pixel size, then productivity is improved, but capacitance coupling increases causing potential changes and decreased saturation signal amount

Engineering Contradiction:
Improvepixel size reductionVSAvoidsaturation signal amount
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The shielding wiring line is positioned between adjacent transfer wiring lines to act as a mediator that blocks capacitive coupling. Even when the interval between transfer wiring lines is narrowed to reduce pixel size, the shielding wiring line prevents the capacitive interference from affecting the transfer gate potential, thereby maintaining saturation signal amount precision despite the reduced spacing.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The shielding wiring line connected to fixed potential creates an equipotential barrier between adjacent transfer wiring lines. This equipotential shielding effect cancels out the capacitive coupling that would otherwise increase when wiring lines are narrowed, allowing pixel size reduction without compromising saturation signal amount precision.

Inventive Principle:
Principle #12Equipotentiality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively reduces the variation in saturation signal amount, enabling higher pixel characteristics and improved image quality by minimizing the impact of capacitance coupling on the transfer gate potential.

Implementation Method 1

miniaturization of pixel size leads to increased capacitance coupling between wiring lines, causing potential changes in the transfer gate

Methodology Applied
Scientific EffectCapacitance coupling: Capacitance

Data Source

PatentUS10121807B2Solid state imaging device and electronic apparatus
Publication Date: 2018.11.06 SONY GROUP CORP
  • US10121807B2 patent drawing
  • US10121807B2 patent drawing
  • US10121807B2 patent drawing

AI summary

Provided is a solid state imaging device including: a pixel portion where pixel sharing units are disposed in an array shape and where another one pixel transistor group excluding transfer transistors is shared by a plurality of photoelectric conversion portions; transfer wiring lines which are connected to the transfer gate electrodes of the transfer transistors of the pixel sharing unit and which are disposed to extend in a horizontal direction and to be in parallel in a vertical direction as seen from the top plane; and parallel wiring lines which are disposed to be adjacent to the necessary transfer wiring lines in the pixel sharing unit and which are disposed to be in parallel to the transfer wiring lines as seen from the top plane, wherein voltages which are used to suppress potential change of the transfer gate electrodes are supplied to the parallel wiring lines.