Solid State Imaging Device Switch Timing for Readout Speed
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Solution Overview
Problem
Existing solid state imaging devices, such as CMOS image sensors, face challenges in achieving high readout rates due to the influence of pixel transistor transitions on signal processing, leading to difficulties in image quality and pixel density.
Innovation Solution
The implementation of a solid state imaging device with a pixel structure that includes a photoelectric conversion unit, amplification transistor, reset transistor, and a signal processing circuit, where a switch is maintained in an off-state during certain transistor transitions, isolating the signal line from the input node and allowing for controlled signal sampling and holding, thereby reducing the impact of transistor transitions on readout timing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the switch is kept in on-state during reset transistor transition, then the signal line remains connected to the input node for continuous signal processing, but voltage fluctuations from transistor transitions propagate to the signal line causing readout errors and image quality deterioration
Solution Approach 1:
The switch is turned off before the reset transistor transition occurs and turned on after the transition completes. This preliminary anti-action isolates the signal line from voltage fluctuations before they can propagate, preventing readout errors while maintaining signal processing reliability
Solution Approach 2:
The switch acts as an intermediary element between the signal line and the input node. By controlling the switch timing, it mediates the connection state to block harmful voltage fluctuations while allowing normal signal transmission, thus protecting the signal line without compromising overall system function
2Reliability
If the switch is turned off during reset transistor transition to isolate voltage fluctuations, then signal processing reliability improves, but the settling time of the input node voltage increases reducing readout rate
Solution Approach 1:
The switch is turned off in advance before the reset transistor transition to prevent voltage fluctuation propagation. This preliminary isolation action ensures that when the transition occurs, the signal line is already protected, allowing the input node to settle without affecting ongoing signal processing, thus reducing the effective settling time impact on readout rate
3Measurement precision
If pixel density is increased to achieve higher resolution, then image quality improves, but the area available for each pixel decreases making it difficult to maintain proper signal processing timing and isolation
Solution Approach 1:
The switch timing is dynamically adjusted based on the reset transistor transition timing. This dynamic control allows the isolation period to be optimized for each pixel's specific characteristics, enabling proper signal processing timing even in high-density pixel arrays where fixed timing would be insufficient
Solution Approach 2:
The control signal timing parameters are changed to coincide with the reset transistor transition. By adjusting the switch on/off timing parameters to match the transistor transition, the system maintains reliable signal isolation while accommodating reduced pixel areas and faster required readout rates
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables faster readout rates and improved image quality by minimizing the settling time of voltages at the input node, allowing for higher pixel densities and finer pixels without deteriorating image quality.
Implementation Method 1
a pixel having a photoelectric conversion unit that generates charges
Data Source
AI summary
Disclosed embodiments perform readout at a high rate without being affected by transition of pixel transistors. A solid state imaging device of an embodiment has a pixel having a photoelectric conversion unit that generates charges, an amplification transistor including an input node that receives a signal based on the charges generated in the photoelectric conversion unit, and a reset transistor that resets the potential of the input node of the amplification transistor; a signal processing circuit that reads out a signal from the pixel via a signal line; and a switch provided between the signal line and an input node of the signal processing circuit, and a signal value of a control signal applied to the gate of the reset transistor changes while the switch is in the off-state.