Solid-State Imaging Device Vertical Scanning Circuit Control
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Solution Overview
Problem
CMOS image sensors face challenges in reducing circuit size and power consumption while maintaining high-speed performance, particularly due to the increased area and power requirements when vertical scanning circuits are arranged on both sides of the pixels and power-supply PADs and GND PADs are doubled.
Innovation Solution
A solid-state imaging device with a pixel array and two vertical scanning circuits, where a control part generates a driving switch signal to stop the driving of one vertical scanning circuit based on an imaging mode signal, allowing for efficient high-speed reading in rolling shutter mode and reducing power consumption by only driving one circuit in global shutter mode, with power-supply and GND terminals arranged on one side to minimize circuit area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If two vertical scanning circuits are arranged on both sides of the pixels for high speed, then the driving performance of the CMOS image sensors is improved, but the areas of the CMOS image sensors are increased correspondingly
Solution Approach 1:
The patent implements dynamic switching between one-vertical-scanning-circuit mode and two-vertical-scanning-circuits mode based on imaging requirements. The control unit selectively activates one or both vertical scanning circuits, allowing the system to adapt its performance and area usage dynamically rather than being fixed at maximum capacity
Solution Approach 2:
The same vertical scanning circuits serve multiple functions: they can operate individually or together depending on the imaging mode, and the control unit manages their operation to achieve both high-speed performance when needed and area efficiency when full speed is not required
2Speed
If power-supply PADs and GND PADs for driving the vertical scanning circuits are arranged on both sides, then the driving performance is improved, but the areas of the CMOS image sensors are further increased
Solution Approach 1:
The patent merges the power-supply PADs and GND PADs into a single location rather than distributing them on both sides. This consolidation reduces the total area occupied by power supply structures while still supporting the operation of vertical scanning circuits
3Speed
If the number of the vertical scanning circuits is doubled for high speed, then the driving performance is improved, but the consumption power is increased
Solution Approach 1:
The system dynamically adjusts power consumption by selectively activating one or two vertical scanning circuits based on imaging requirements. When high-speed performance is not needed, only one circuit operates, significantly reducing power consumption compared to continuously operating both circuits at full capacity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces circuit size and power consumption while enabling high-speed imaging without image distortion, by selectively driving one vertical scanning circuit during low-speed reading modes and both during high-speed reading modes, thus optimizing performance and area usage.
Implementation Method 1
a light charge generated and accumulated by a photoelectric conversion part
Data Source
AI summary
Disclosed is a solid-state imaging device including a pixel array, two vertical scanning circuits, and a control part. The pixel array has a plurality of pixels arranged in a two-dimensional matrix form. The two vertical scanning circuits are configured to sequentially select and scan each of the pixels in a vertical direction per row. The control part is configured to generate, based on a mode signal corresponding to an imaging mode, a driving switch signal to stop driving of one of the two vertical scanning circuits.