Solid-State Imaging Device Vertical Transfer Transistor
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
CMOS solid-state imaging devices face challenges in miniaturizing pixels while maintaining imaging characteristics, such as the amount of saturated charges, due to noise and process limitations, which affect the formation of p-n junctions and gate insulating films, leading to performance issues and variations in charge transfer capabilities.
Innovation Solution
A solid-state imaging device with a p-n junction formed close to the surface and deep within the semiconductor substrate, featuring a transfer transistor with a transfer gate electrode extended on the surface and buried within the substrate, allowing independent potential application and improved charge transfer, and a method of manufacturing this device involving the formation of a vertical hole and gate insulating film to create a three-dimensional transistor structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the p-n junction is formed deeper inside the semiconductor substrate to increase the amount of saturated charges, then the imaging characteristics are improved, but the device area occupied by the photodiode increases, making pixel miniaturization difficult
Solution Approach 1:
The invention transitions from a planar photodiode structure to a three-dimensional stacked structure with multiple photodiodes arranged vertically. This allows the photodiodes to extend in the depth direction rather than occupying lateral space, enabling pixel miniaturization while maintaining or increasing the total charge storage capacity through vertical stacking of multiple charge accumulation regions
Solution Approach 2:
The invention embeds multiple photodiodes and pixel transistors in a stacked configuration where components are nested vertically within the semiconductor substrate. The pixel transistors are formed in upper regions while photodiodes are stacked in lower regions, creating a nested three-dimensional structure that increases charge storage capacity without increasing the lateral footprint of each pixel
2Productivity
If the pixel area is reduced to increase the number of pixels, then the resolution is improved, but the amount of saturated charges per unit area decreases, degrading imaging performance
Solution Approach 1:
By stacking multiple photodiodes vertically in the depth direction, the invention increases the total charge storage capacity within a reduced lateral area. Each photodiode contributes to the overall charge storage, and their vertical arrangement allows the pixel density to increase while maintaining sufficient charge storage capacity through the third dimension
Solution Approach 2:
The invention changes the spatial distribution parameter of the photodiodes from a single lateral region to multiple vertical layers. By forming photodiodes at different depths with different orientation relationships to the substrate surface, the total charge storage capacity is increased while the lateral dimensions are reduced, thereby increasing pixel density without sacrificing imaging performance
3Reliability
If a vertical transfer transistor is formed to enable charge transfer from deep photodiodes, then the charge transfer capability is improved, but the manufacturing complexity and process difficulty increase
Solution Approach 1:
The transfer transistor is segmented into multiple components: a gate electrode formed in the upper region and separate source/drain regions formed in lower regions. This segmentation allows the gate and source/drain to be formed at different processing stages and locations, simplifying the manufacturing process compared to forming a complete vertical transistor structure in one step
Solution Approach 2:
The gate electrode of the transfer transistor is formed in advance before the source and drain regions. This preliminary formation of the gate structure allows subsequent source/drain formation processes to be optimized independently, and enables the use of standard planar processing techniques for the source/drain regions while maintaining the vertical charge transfer function
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration increases the amount of saturated charges per unit area, enhances charge transfer efficiency, and maintains the reliability of the device characteristics, enabling miniaturization without compromising imaging performance.
Implementation Method 1
This photodiode is a photoelectric conversion element that generates and accumulates signal charges in response to the amount of light received
Data Source
AI summary
A solid-state imaging device is provided, which includes a pixel region in which pixels including a photoelectric conversion section and a plurality of pixel transistors are arranged. In the solid-state imaging device, a transfer transistor of the pixel transistors includes: a transfer gate electrode extended in a surface of the substrate formed on the surface of a semiconductor substrate; and a transfer gate electrode buried in the substrate which is electrically insulated from the transfer gate electrode extended in a surface of the substrate and is embedded in the inside of the semiconductor substrate in the vertical direction through the transfer gate electrode extended in a surface of the substrate.