In-Memory Computing with Row-Column Hybrid Grouping
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Solution Overview
Problem
Existing in-memory computing (IMC) methods face inefficiencies in memory cell utilization and operation speed due to limitations in column and row grouping techniques, leading to increased computing cycles and reduced performance.
Innovation Solution
The implementation of a row-column hybrid grouping (RCHG) method that dynamically controls memory cell activation and weight allocation using a controller, optimizing memory array operations through a multi-bit representation and coefficient control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If traditional column or row grouping techniques are used in in-memory computing, then the device complexity is reduced, but the productivity and operation speed deteriorate due to increased computing cycles and poor memory cell utilization
Solution Approach 1:
The memory array is segmented into multiple bit-width groups (e.g., 2-bit, 4-bit, 8-bit groups) allowing selective activation of only the necessary precision groups for each computation task. This segmentation enables fine-grained control over resource utilization, activating only the required number of memory cells and computation units, thereby maintaining low device complexity while achieving high productivity through optimized resource usage.
Solution Approach 2:
The system dynamically configures the precision and grouping structure based on the specific computation requirements. The controller adaptively selects which bit-width groups to activate and how to organize the memory cells and computation units, allowing the architecture to optimize its structure in real-time for different workloads, thus resolving the contradiction between fixed simplicity and variable performance needs.
2Ease of operation
If traditional column or row grouping techniques are used in in-memory computing, then the ease of operation is improved, but the productivity deteriorates due to increased computing cycles
Solution Approach 1:
The system performs preliminary configuration of memory cell groups and computation unit groups before actual computation begins. The controller pre-organizes the memory array into optimal bit-width groups and pre-configures the computation units based on the incoming computation task requirements. This preliminary setup eliminates the need for dynamic reconfiguration during computation, maintaining ease of operation while minimizing computing cycles through optimized ready-to-execute groupings.
3Manufacturing precision
If multi-bit representation with dynamic coefficient control is implemented, then the manufacturing precision is improved, but the device complexity increases
Solution Approach 1:
The system changes the precision parameter dynamically by selecting different bit-width groups (2-bit, 4-bit, 8-bit) based on the specific weight precision requirements of the computation task. The controller adjusts which bit-width groups are activated and how weights are allocated across these groups, allowing high precision to be achieved only when and where needed, thereby maintaining manufacturing precision while controlling device complexity through selective parameter adjustment rather than universal high precision.
Data Source
AI summary
An in-memory computing (IMC) device includes a controller configured to generate a command signal for a multi-bit representation and a multi-bit operation based on row-column hybrid grouping (RCHG), a memory array configured to store a weight that is used in the multi-bit operation and perform an operation of the weight and an input value, and an operation circuit configured to dynamically control a coefficient by following the multi-bit representation and output a final operation result based on the controlled coefficient and a result of the operation of the weight and the input value.