Immersion-Cooled Semiconductor Package With Dielectric Coating

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Solution Overview

Problem

Current heat dissipation technologies for high-power processors in 2.5D and 3D ICs are inadequate for maintaining optimal operating temperatures, especially as processor powers exceed 700 W/chip, leading to thermal management challenges and reduced performance in high-end applications like HPC and AI.

Innovation Solution

The implementation of a semiconductor package design that incorporates a water-based liquid coolant for liquid immersion cooling, with a conformal dielectric coating to protect electronic components and enhance heat dissipation, allowing for efficient removal of heat generated by chip hot spots through close contact with the coolant.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If conventional air cooling or direct-to-chip liquid cooling is used for high-power processors, then the cooling system is simpler to implement, but the heat dissipation efficiency is insufficient for processors exceeding 700 W/chip

Engineering Contradiction:
Improveprocessor operating temperatureVSAvoidheat dissipation efficiency
Core Design Contradiction:
TemperatureVSPower

Solution Approach 1:

The patent employs liquid immersion cooling where the processor is directly submerged in a dielectric liquid coolant. This hydraulic cooling method allows the coolant to directly contact the processor surface and carry away heat through convection and conduction, achieving superior heat dissipation efficiency compared to air cooling or indirect liquid cooling methods for high-power processors exceeding 700 W/chip

Inventive Principle:
Principle #29Pneumatics and hydraulics

Solution Approach 2:

The patent utilizes phase change materials or phase transition mechanisms in the dielectric liquid cooling system. The coolant may undergo phase transitions (such as evaporation and condensation cycles) to absorb and dissipate large amounts of heat from the processor, significantly enhancing the heat dissipation efficiency for high-power applications

Inventive Principle:
Principle #36Phase transitions

2Reliability

If a conformal dielectric coating is applied to protect electronic components from liquid coolant, then component protection is improved, but heat dissipation efficiency is reduced due to the thermal barrier

Engineering Contradiction:
Improveelectronic component protectionVSAvoidheat dissipation efficiency
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The patent applies a conformal dielectric coating as a thin film layer on the processor surface. This thin protective film provides electrical insulation and protects electronic components from the liquid coolant while maintaining sufficient thermal conduction capability to allow efficient heat transfer from the processor to the coolant, balancing protection and heat dissipation needs

Inventive Principle:
Principle #30Flexible shells and thin films

Solution Approach 2:

The patent optimizes the parameters of the dielectric coating, including its thickness, thermal conductivity, and dielectric strength. By carefully controlling these parameters, the coating provides adequate electrical protection while minimizing thermal resistance to maintain high heat dissipation efficiency in liquid immersion cooling systems

Inventive Principle:
Principle #35Parameter changes

3Speed

If processors are placed closer to memory stacks to reduce data transfer time, then data transfer speed is improved, but thermal management becomes more challenging due to increased heat density

Engineering Contradiction:
Improvedata transfer speedVSAvoidthermal management difficulty
Core Design Contradiction:
SpeedVSTemperature

Solution Approach 1:

The patent integrates the processor and memory stacks into a unified liquid immersion cooling system. Both components are submerged in the same dielectric liquid coolant, allowing the cooling system to simultaneously manage heat from multiple heat-generating components. This merged approach enables close proximity placement of processor and memory while maintaining effective thermal management through the shared coolant environment

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent uses liquid immersion cooling to enable dense integration of processor and memory stacks. The dielectric liquid coolant flows through the integrated structure, providing continuous heat removal from both processor and memory components, thereby allowing them to be placed in close proximity for high-speed data transfer without compromising thermal management

Inventive Principle:
Principle #29Pneumatics and hydraulics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables highly efficient heat dissipation, maintaining desired operation temperatures and improving performance by allowing for closer proximity of high-power processors to memory stacks, thereby reducing data transfer times and power consumption.

Implementation Method 1

The plurality of air gaps are arranged to facilitate flow of a water-based liquid coolant to closely contact the first semiconductor die and the plurality of second semiconductor dies

Methodology Applied
Scientific EffectConvection: Convection

Implementation Method 2

allowing for efficient removal of heat generated by chip hot spots through close contact with the coolant

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 3

a conformal dielectric coating to protect electronic components and enhance heat dissipation

Methodology Applied
Scientific EffectDielectric property: Dielectric

Data Source

PatentUS20240379498A1Semiconductor package for liquid immersion cooling and method of forming the same
Publication Date: 2024.11.14 ND-HI TECH LAB INC
  • US20240379498A1 patent drawing
  • US20240379498A1 patent drawing
  • US20240379498A1 patent drawing

AI summary

A semiconductor package includes: a first semiconductor die disposed over a first substrate; a plurality of second semiconductor dies disposed over the first semiconductor die or adjacent to the first semiconductor die; a plurality of first connectors arranged between and electrically connecting the first semiconductor die and the first substrate; a plurality of second connectors arranged between and electrically connecting two of the second semiconductor dies; a first dielectric layer encapsulating the plurality of second connectors; and a dielectric coating, different from the first dielectric layer, conformally formed on exposed surfaces of the plurality of first connectors and laterally surrounding the first dielectric layer. A plurality of air gaps are arranged between the plurality of first connectors.