Impedance Bridge Circuit Using Step Stimulus and Integration
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Solution Overview
Problem
Existing impedance sensing techniques require high power dissipation and circuit complexity to achieve accurate measurements at MHz frequencies, and impedance bridges are difficult to implement at low cost and low power for characterizing complex test load impedances.
Innovation Solution
A novel impedance bridge circuitry that applies a time-varying test stimulus with step changes, using a programmable reference load with integrated capacitors and resistors, and integrates sense voltages to derive impedance characteristics through programmable impedance adjustments.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If sinusoidal stimulus at MHz frequencies is used for impedance sensing, then measurement precision is improved, but power consumption and circuit complexity increase significantly
Solution Approach 1:
The patent changes the frequency parameter from MHz range to lower frequencies, and changes the stimulus waveform from sinusoidal to step changes. This allows accurate impedance measurement without requiring complex high-frequency circuitry, thereby reducing device complexity while maintaining measurement precision through the use of integration to extract impedance characteristics from the step response
Solution Approach 2:
The patent replaces the traditional sinusoidal stimulus generation and phase measurement approach with a step-change voltage approach combined with integration. Instead of measuring phase and magnitude of sinusoidal response, the system integrates the current response to a step voltage change, substituting complex analog phase detection with simpler integration circuitry
2Measurement precision
If sinusoidal stimulus at MHz frequencies is used for impedance sensing, then measurement precision is improved, but power dissipation increases significantly
Solution Approach 1:
The patent changes the operating frequency from MHz to lower frequencies, which directly reduces power dissipation in the circuit elements. The step-change stimulus approach also allows for lower average power consumption compared to continuous sinusoidal excitation at high frequencies, while integration maintains measurement accuracy
3Loss of energy
If impedance bridge is used for low cost and low power impedance sensing, then power consumption and cost are reduced, but ability to characterize complex test load impedances deteriorates
Solution Approach 1:
The patent segments the impedance measurement into two separate measurements: capacitive coupling measurement and resistive measurement. By using step changes and integration, the system can separately extract capacitive and resistive components of complex impedance, enabling accurate characterization of complex test loads while maintaining low power consumption through the simplified measurement approach
Solution Approach 2:
The patent uses feedback by adjusting the programmable reference load impedance based on the integrated measurement results. The system compares the integrated response with the reference load and iteratively adjusts the reference impedance to match the test load characteristics, enabling accurate characterization of complex impedances through a low-power bridge configuration
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables accurate impedance characterization with reduced power consumption and circuit complexity, distinguishing capacitive coupling between electrodes and a sensed object, and detecting resistance with minimal error.
Implementation Method 1
a first integrator configured to integrate a sense voltage derived from the sense node to generate a first integrated signal
Data Source
AI summary
Circuitry for characterising a test impedance of a test load, the test load coupled between a sense node and a first driver node, the circuitry comprising: driver circuitry configured to apply a time-varying test stimulus between the first driver node and a second driver node, the test stimulus varied in step changes at a one or more of signal events; a reference load coupled between the second driver node and the sense node, the reference load having a programmable impedance comprising: a first programmable capacitance; a programmable resistance connected in series with the first programmable capacitance to form a series combination; and a first integrator configured to integrate a sense voltage derived from the sense node to generate a first integrated signal.


