Semiconductor Impedance Calibration Using Shared Resistance Arbitration

Solution Overview

Problem

As the number of memory devices coupled to a shared external resistance for calibration increases, it becomes challenging to complete the calibration process for all devices within the specified time period, leading to potential impedance mismatches and data distortion.

Innovation Solution

The implementation of a calibration circuit that arbitrates for the shared external resistance and performs calibration operations in the background, allowing for the storage and application of calibration parameters without relying on explicit commands from a memory controller.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multiple memory devices share a common external resistance for calibration, then the quantity of devices that can be calibrated is increased, but the calibration time exceeds the specified time period

Engineering Contradiction:

Improvenumber of memory devicesVSAvoidcalibration time

Core Design Contradiction:

Quantity of substanceVSLoss of time

Solution Approach 1:

The calibration circuit performs calibration operations in the background before the memory device needs to access the external resistance for normal operation. By completing calibration preliminarily and storing the results, the system allows multiple devices to be calibrated without extending the critical time period when external resistance is needed for memory operations.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

A calibration circuit acts as an intermediary between multiple memory devices and the shared external resistance. This intermediary manages access to the external resistance, coordinating calibration operations for multiple devices sequentially or in parallel, and storing calibration parameters locally to avoid repeated access conflicts.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If calibration operations are performed sequentially for multiple devices, then contention for the external resistance is avoided, but the total calibration time increases

Engineering Contradiction:

Improvecalibration accuracyVSAvoidtotal calibration time

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The calibration circuit performs calibration operations in the background before the memory device needs to access the external resistance for normal operation. By completing calibration preliminarily and storing the results, the system allows multiple devices to be calibrated without extending the critical time period when external resistance is needed for memory operations.

Inventive Principle:

Principle #10Preliminary action

3Reliability

If calibration parameters are applied immediately after calibration, then the data transmission reliability is improved, but the risk of contention for external resistance increases

Engineering Contradiction:

Improvedata transmission reliabilityVSAvoidcontention for external resistance

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

A calibration circuit acts as an intermediary between multiple memory devices and the shared external resistance. This intermediary manages access to the external resistance, coordinating calibration operations for multiple devices sequentially or in parallel, and storing calibration parameters locally to avoid repeated access conflicts.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The calibration circuit performs calibration operations in the background before the memory device needs to access the external resistance for normal operation. By completing calibration preliminarily and storing the results, the system allows multiple devices to be calibrated without extending the critical time period when external resistance is needed for memory operations.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS20250141432A1Apparatuses and methods for calibrating adjustable impedances of a semiconductor device

Publication Date: 2025.05.01 LODESTAR LICENSING GROUP LLC

AI summary

Apparatuses and methods for calibrating adjustable impedances of a semiconductor device are disclosed in the present application. An example apparatus includes a register configured to store impedance calibration information and further includes programmable termination resistances having a programmable impedance. The example apparatus further includes an impedance calibration circuit configured to perform a calibration operation to determine calibration parameters for setting the programmable impedance of the programmable termination resistances. The impedance calibration circuit is further configured to program the impedance calibration information in the register related to the calibration operation.