Semiconductor Impedance Calibration With Shared Resistor Arbitration

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Solution Overview

Problem

As the number of semiconductor devices coupled to a shared external resistance for calibration increases, it becomes challenging to complete calibration operations for all devices within a specified time period, leading to potential impedance mismatches and data distortion, especially as operational speeds increase and signal swing widths decrease.

Innovation Solution

A calibration circuit that arbitrates among multiple devices for access to the shared external resistance, allowing for background calibration operations and automatic application of calibration parameters without relying on memory controller commands, thereby reducing the total time required for calibration and preventing contention.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If multiple devices share a common external resistance for calibration, then the number of external connections is reduced, but calibration time increases and contention arises

Engineering Contradiction:

Improvenumber of external connectionsVSAvoidcalibration time

Core Design Contradiction:

Area of stationary objectVSLoss of time

Solution Approach 1:

The calibration circuit performs calibration operations in the background before main operations begin. The system proactively completes calibration during idle periods or before high-speed operations start, ensuring impedance matching is established beforehand to avoid delays during critical operations.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The calibration system dynamically adjusts its operation mode based on system state. It can switch between background calibration mode (when resources are available) and on-demand calibration mode (when triggered by specific events), optimizing the balance between connection sharing and calibration timing.

Inventive Principle:

Principle #15Dynamics

2Reliability

If calibration operations are performed sequentially for multiple devices, then contention for the shared external resistance is avoided, but total calibration time becomes excessively long

Engineering Contradiction:

Improvecontention avoidanceVSAvoidcalibration throughput

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The calibration circuit maintains continuous calibration operations by utilizing background processing. Instead of idle waiting between sequential calibrations, the system continuously performs calibration measurements and updates impedance values during periods when the shared external resistance is not critically needed, maximizing resource utilization.

Inventive Principle:

Principle #20Continuity of useful action

Solution Approach 2:

The system implements periodic calibration cycles where calibration operations are performed at regular intervals or based on predefined triggers. This allows multiple devices to be calibrated in a structured manner, with each device receiving attention during its designated period while maintaining overall system productivity.

Inventive Principle:

Principle #19Periodic action

3Manufacturing precision

If calibration parameters are applied immediately after calibration, then impedance matching is optimized, but the time window for multiple device calibration within the specified period decreases

Engineering Contradiction:

Improveimpedance matching accuracyVSAvoidtime window for calibration

Core Design Contradiction:

Manufacturing precisionVSDuration of action of moving object

Solution Approach 1:

Calibration parameters are determined and stored in advance during background calibration operations. The actual parameter application is deferred until the calibration cycle is complete, allowing the system to prepare all necessary calibration data before committing to the impedance matching configuration, thus optimizing both accuracy and timing.

Inventive Principle:

Principle #10Preliminary action

4Speed

If operational speed increases, then data transmission performance improves, but signal swing width decreases making the system more susceptible to noise and impedance mismatch

Engineering Contradiction:

Improveoperational speedVSAvoidsignal integrity

Core Design Contradiction:

SpeedVSReliability

Solution Approach 1:

The calibration circuit continuously monitors signal characteristics and impedance conditions, using feedback to adjust calibration parameters. This closed-loop approach ensures that as operational speed increases and signal swing decreases, the system can dynamically compensate for noise and impedance variations to maintain signal integrity.

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS11482989B2Apparatuses and methods for calibrating adjustable impedances of a semiconductor device

Publication Date: 2022.10.25 LODESTAR LICENSING GROUP LLC

AI summary

Apparatuses and methods for calibrating adjustable impedances of a semiconductor device are disclosed in the present application. An example apparatus includes a register configured to store impedance calibration information and further includes programmable termination resistances having a programmable impedance. The example apparatus further includes an impedance calibration circuit configured to perform a calibration operation to determine calibration parameters for setting the programmable impedance of the programmable termination resistances. The impedance calibration circuit is further configured to program the impedance calibration information in the register related to the calibration operation.