Multi-Channel Impedance Calibration Circuit for Update Timing Conflicts
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Solution Overview
Problem
In semiconductor apparatuses, impedance mismatch due to process, voltage, and temperature variations causes signal distortion, and existing impedance adjustment methods fail to update impedance codes reliably across multiple channels due to timing issues, leading to incomplete or incorrect updates.
Innovation Solution
An impedance adjustment circuit with a calibration circuit and code update circuit that performs independent impedance adjustments for each channel, using a shared external resistor, ensuring reliable impedance code updates by blocking updates for one channel during the operation of another.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single external resistor is shared by multiple channels to perform impedance adjustment operation, then device complexity is reduced, but timing conflicts occur causing incomplete or incorrect impedance code updates
Solution Approach 1:
The patent implements dynamic control of the shared external resistor by introducing a control signal that selectively connects the resistor to different channels based on their respective update requests. This dynamic switching mechanism allows the single resistor to serve multiple channels without timing conflicts, resolving the contradiction between reduced device complexity and maintained update reliability
Solution Approach 2:
The patent introduces a control signal as an intermediary between multiple channels and the shared external resistor. This intermediary manages the timing and sequencing of impedance adjustment operations, ensuring that only one channel accesses the resistor at a time, thereby preventing update conflicts while maintaining system simplicity
2Reliability
If impedance adjustment operation is performed for each channel independently, then update reliability improves, but device complexity increases due to requiring separate resistors for each channel
Solution Approach 1:
The patent makes the external resistor universal by enabling it to serve multiple channels sequentially through control signal management. Instead of dedicating separate resistors to each channel, the single resistor is designed to handle impedance adjustment for any channel that requires it, achieving both reliability through controlled independent updates and simplicity through resource sharing
Solution Approach 2:
The patent implements a mechanism where the shared external resistor is temporarily 'discarded' from active use during impedance adjustment operations and then 'recovered' for subsequent operations. By controlling access timing through update request signals and control signals, the system ensures the resistor is fully released before being reused, preventing conflicts while maintaining single-resistor architecture
3Ease of operation
If impedance code update timing is not synchronized across channels, then channel independence is maintained, but timing mismatches cause incorrect impedance code updates
Solution Approach 1:
The patent implements feedback control by monitoring update request signals from each channel and adjusting the control signal accordingly. When an update request is detected, the system activates the external resistor for that channel and maintains it active until the update is complete, ensuring accurate timing without compromising channel independence. This feedback mechanism synchronizes operations precisely
4Reliability
If impedance adjustment operation duration is extended to ensure complete updates, then update reliability improves, but timing margin for multiple channels decreases
Solution Approach 1:
The patent implements periodic action by structuring impedance updates as discrete, time-bound operations triggered by update request signals. Each channel receives dedicated time slots to perform its impedance adjustment, with the control signal managing the periodic activation and deactivation of the external resistor. This approach ensures complete updates for each channel while efficiently managing the timing margin across multiple channels through structured periodic operation
Data Source
AI summary
An impedance adjustment circuit includes a calibration circuit and a code update circuit. The calibration circuit performs an impedance adjustment operation to generate a source impedance code in response to activation of an impedance adjustment enable signal. The code update circuit performs a first channel code update operation to update a first channel impedance code according to the source impedance code when a first channel code update request signal is input, performs a second channel code update operation to update a second channel impedance code according to the first channel impedance code when a second channel code update request signal is input, and blocks the second channel code update operation when the second channel code update request signal is input while performing the first channel code update operation.