Impedance Control Circuit with Update Prohibition for Signal Integrity
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Solution Overview
Problem
Existing impedance control methods in semiconductor devices face challenges in maintaining precise impedance matching due to process, voltage, and temperature variations, leading to potential signal distortion and noise during data transitions, especially when updating impedance values simultaneously or without a training sequence.
Innovation Solution
A drive circuit with an impedance matching array unit and an update prohibition control unit that generates transfer control signals to prevent transistor driving during data transitions and performs impedance updates during a power reset to before the initial data transition, using sampling clocks to latch control code data and update impedance values without a training sequence.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If impedance control code data is updated simultaneously with internal data transition, then impedance matching can be maintained under PVT variations, but impedance matching errors occur during data transitions causing signal distortion
Solution Approach 1:
The patent applies preliminary action by updating the impedance control code data before the internal data transition occurs. The control circuit detects the internal data transition and updates the impedance code in advance during a predetermined time interval, ensuring that the impedance matching is already established when the data transition completes, thereby avoiding signal distortion.
Solution Approach 2:
The patent implements periodic action by dividing the impedance update process into specific time intervals relative to the data transition. The control circuit operates in periodic cycles: detecting internal data transition, updating impedance code during a first time interval, and maintaining the update prohibition during a second time interval, creating a rhythmic control pattern that prevents distortion.
2Measurement precision
If a training sequence is used for impedance updates, then impedance matching precision can be improved, but data transmission time increases and productivity decreases
Solution Approach 1:
The patent eliminates the need for a training sequence by performing preliminary impedance updates based on detected internal data transitions. The control circuit proactively adjusts impedance codes before data transmission issues can arise, achieving precise impedance matching without requiring time-consuming training sequences, thus maintaining high data transmission speed.
Solution Approach 2:
The patent enables the impedance control system to be self-regulating by automatically detecting internal data transitions and autonomously updating impedance codes without external training sequences. The control circuit monitors its own operating conditions and performs necessary adjustments, eliminating the need for separate training phases and improving overall productivity.
3Adaptability or versatility
If impedance code update is performed during active data transmission, then real-time impedance adaptation to PVT variations is achieved, but impedance matching errors cause noise and distortion
Solution Approach 1:
The patent applies periodic action by implementing time-interval-based control where impedance updates occur only during specific periods (first time interval) when internal data is stable, while prohibiting updates during other periods (second time interval) when data transitions occur. This periodic control pattern enables real-time adaptation without generating noise or distortion.
Solution Approach 2:
The patent uses feedback by having the control circuit continuously monitor internal data transition states and adjust impedance code updates accordingly. The control circuit receives feedback about the current data transmission state and modifies its impedance update timing, updating only when feedback indicates it is safe to do so, thereby avoiding noise and distortion.
Data Source
AI summary
A drive circuit having impedance control includes an impedance matching array unit having a plurality of transistors, the plurality of transistors selectively driven in accordance with an array drive control signal generated by control code data, and an update prohibition control unit for generating a transfer control signal to prohibit driving the transistors during a first time interval occurring when internal data transition, and applying the transfer control signal to the impedance matching array unit.