Multi-Level Impedance Matching Circuit for Stable PAM Output
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Solution Overview
Problem
Existing PAM methods for high-speed and high-capacity data transmission face instability due to process angle, temperature, voltage, and other factors, leading to unpredictable output impedance and compromised signal integrity.
Innovation Solution
An impedance matching circuit comprising a driver circuit, a calibration circuit, a digital logic circuit, a receiving circuit, and a first resistor, which performs calibration to determine calibration parameters and adjusts transistor slices to establish impedance matching between the driver and receiving circuits at different output levels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If PAM method is used for high-speed data transmission, then data transmission speed is improved, but output impedance stability deteriorates due to process angle, temperature, and voltage variations
Solution Approach 1:
The patent performs impedance calibration in advance to determine calibration parameters before actual data transmission. The calibration circuit pre-characterizes the driver circuit's impedance characteristics at different output levels and stores these parameters for later use, allowing the system to compensate for impedance variations without real-time adjustments during high-speed operation.
Solution Approach 2:
The patent changes the calibration parameters based on different output levels (e.g., different voltage amplitudes) to maintain impedance matching across varying operating conditions. By having multiple calibration parameters corresponding to different output levels, the system can select the appropriate parameter set to compensate for impedance variations caused by temperature, voltage, and process angle changes.
2Measurement precision
If impedance calibration is performed at multiple output levels, then impedance matching accuracy is improved, but calibration complexity increases
Solution Approach 1:
The patent segments the calibration process into multiple discrete output levels, with each level having its own calibration parameters. This segmentation allows the complex impedance matching problem to be broken down into manageable calibration steps at different amplitude levels, making the overall calibration process more systematic and controllable.
Solution Approach 2:
The calibration circuit automatically performs impedance calibration and determines calibration parameters without requiring external manual intervention. The system self-characterizes its impedance properties at different output levels and stores these parameters for automatic selection during operation, reducing the complexity of manual calibration procedures.
3Reliability
If transistor slices are adjusted for impedance matching, then signal integrity is improved, but power consumption increases
Solution Approach 1:
The patent adjusts only the necessary transistor slices to achieve impedance matching at each output level, rather than adjusting all transistors in the driver circuit. This partial action approach maintains signal integrity by correcting impedance issues where they occur while leaving other parts of the circuit unchanged, thereby minimizing additional power consumption.
Data Source
AI summary
An impedance matching circuit includes a driver circuit, a calibration circuit, a digital logic circuit, a receiving circuit and a first resistor. An output of the driver circuit is connected to the receiving circuit, and an output of the calibration circuit is connected to the first resistor. The calibration circuit is configured to cooperate with the driver circuit to perform calibration according to the impedance values of the first resistor and the receiving circuit to determine a plurality of calibration parameters obtained at different output level values. The digital logic circuit is configured to receive the plurality of calibration parameters and determine a respective target calibration parameter of each of the at least one transistor slice in the driver circuit. The driver circuit is configured to receive the target calibration parameter, and perform impedance adjustment on the at least one transistor slice according to the target calibration parameter.