Variable-Capacitance Impedance Matching for Fast Plasma Tuning
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Solution Overview
Problem
Existing solid state impedance matching networks in semiconductor manufacturing lack the voltage/current handling capability and resolution of electro-mechanical systems while being more expensive and slower than needed for plasma processing applications.
Innovation Solution
A solid state impedance matching network utilizing a matrix tuning element with variable capacitance diodes arranged in columns and series, coupled with a transformer and additional variable capacitance elements, allowing for rapid and precise impedance matching through DC bias voltage control, reducing cost and improving performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If solid state impedance matching networks are used, then tuning speed is improved, but voltage/current handling capability deteriorates
Solution Approach 1:
The patent divides the impedance matching network into multiple parallel branches, each containing matrix tuning elements with variable capacitance. This segmentation allows the system to handle higher voltages and currents by distributing the load across multiple solid state components, while maintaining fast tuning speeds through electronic control of each segment.
Solution Approach 2:
The patent replaces electro-mechanical tuning systems with solid state matrix tuning elements controlled by DC bias voltages. This substitution eliminates mechanical moving parts while achieving faster tuning speeds, and through proper circuit design including transformers and multiple branches, maintains adequate voltage and current handling capability.
2Speed
If solid state impedance matching networks are used, then tuning speed is improved, but resolution deteriorates
Solution Approach 1:
The patent employs matrix tuning elements where variable capacitance values are dynamically controlled through DC bias voltages applied to diode arrays. This dynamic control mechanism enables continuous adjustment of impedance parameters, providing fine resolution tuning capability while maintaining fast response times characteristic of solid state systems.
Solution Approach 2:
The patent changes the electrical parameters (capacitance values) of the matrix tuning elements by applying different DC bias voltages to the diode arrays. This parameter control method enables precise and continuous adjustment of the impedance matching characteristics, achieving high resolution tuning without the mechanical limitations of electro-mechanical systems.
3Ease of manufacture
If solid state impedance matching networks are used, then cost is reduced, but voltage/current handling capability deteriorates
Solution Approach 1:
The patent uses multiple parallel branches with matrix tuning elements, allowing the use of lower-cost solid state components in each branch while collectively handling the required voltage and current levels. This segmented approach reduces overall system cost compared to using a single high-power solid state component.
Solution Approach 2:
The patent incorporates transformers as intermediary components in the impedance matching network. These transformers enable voltage transformation and isolation, allowing solid state matrix tuning elements to operate at lower voltage stress while still achieving the required power handling capability through proper impedance transformation ratios.
4Power
If electro-mechanical tuning systems are used, then voltage/current handling capability is improved, but tuning speed deteriorates
Solution Approach 1:
The patent replaces electro-mechanical tuning mechanisms with solid state matrix tuning elements controlled by electronic DC bias voltages. This substitution eliminates mechanical inertia and friction limitations, achieving tuning speeds that are orders of magnitude faster while maintaining adequate power handling through proper circuit design with multiple parallel branches and transformers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides improved tuning speed, resolution, and cost-effectiveness by leveraging diode arrays and DC bias voltage control, aligning with the requirements of plasma processing tools and closing the cost gap with electro-mechanical systems.
Implementation Method 1
each cell comprises an array of diodes coupled to a board, where the array comprises one or more columns of diodes, and where each column comprises four rows of diodes connected in series
Implementation Method 2
a transformer on a second branch from the input, where the transformer has at least a first tap
Data Source
AI summary
Embodiments disclosed herein include an impedance matching network. In an embodiment, the impedance matching network comprises an input, and a first matrix tuning element on a first branch from the input, where the first matrix tuning element comprises a variable capacitance. In an embodiment, the impedance matching network further comprises a transformer on a second branch from the input, where the transformer has at least a first tap, where a second matrix tuning element is on the first tap, and where the second matrix tuning element comprises a variable capacitance. In an embodiment, the impedance matching network further comprises a third matrix tuning element after the transformer on the second branch, where the third matrix tuning element comprises a variable capacitance. In an embodiment, the impedance matching network further comprises an output after the third matrix tuning element on the second branch.