Implant Regions in 3D Memory Stacks to Prevent Over-Etching
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Solution Overview
Problem
Conventional vertical memory array architectures face processing challenges such as over-etching, tier deformation, and damage during the formation of semiconductive channel materials, leading to undesirable deformations and damage in memory devices like NAND Flash memory devices.
Innovation Solution
The introduction of implant regions, specifically first and second implant regions, within the microelectronic device structure to provide etch resistance and protect semiconductive materials during processing stages, allowing for controlled etching and reducing damage to the source stack and cell pillar structures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If etching is performed on semiconductive channel materials to form electrical connections, then electrical communication between memory strings and components is achieved, but over-etching occurs causing tier bending, warping, cracking, and collapse
Solution Approach 1:
The patent applies preliminary action by forming a protective coating on the tiered stack structure before the etching process. This coating is deposited in advance to prevent etchant from directly contacting and damaging the tier structures during subsequent processing steps, thereby preventing over-etching related defects while allowing necessary electrical connections to be formed
2Productivity
If conventional vertical memory array architectures are used to increase memory density, then more memory cells can be packed vertically, but processing challenges such as over-etching and tier deformations arise
Solution Approach 1:
The patent introduces an intermediary protective coating layer between the etchant and the tiered stack structures. This coating acts as a mediator that allows the etching process to proceed for forming electrical connections while preventing the etchant from causing damage to the tier structures, thus enabling conventional vertical architectures to be manufactured with reduced defects
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of implant regions enhances the structural integrity and reduces etching-related damage, improving the reliability and efficiency of memory device fabrication by mitigating over-etching and deformation issues, thereby maintaining the integrity of the memory device structure.
Implementation Method 1
The introduction of implant regions, specifically first and second implant regions, within the microelectronic device structure to provide etch resistance and protect semiconductive materials during processing stages
Data Source
AI summary
A microelectronic device comprises lateral contact structures overlying a source structure and comprising conductive material, a cap material overlying the lateral contact structures and comprising implant regions therein, a stack structure overlying the cap material and comprising a vertically alternating sequence of insulative structures and conductive structures arranged in tiers, and pillars vertically extending through the stack structure and into the source structure. The pillars individually comprise semiconductive channel material in physical contact with the lateral contact structures. The microelectronic device comprises filled slot structures vertically extending at least through the stack structure and the cap material. The filled slot structures are positioned within horizontal areas of the implant regions of the cap material. Related memory devices, electronic systems, and methods of forming the microelectronic devices are also described.