Implanted Dielectric Interface for CMP Metal Loss Prevention
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Solution Overview
Problem
In semiconductor manufacturing, the scaling down of devices leads to challenges such as metal loss during planarization processes due to gaps and cracks between conductive fill materials and interlayer dielectrics, which can result in electrical property degradation and structural damage from subsequent process chemistries.
Innovation Solution
A method is introduced to form conductive features in semiconductor devices without using adhesion or barrier layers, where implantation is employed to create compression stress between the conductive fill material and interlayer dielectric, closing gaps and cracks, thereby preventing metal loss during chemical mechanical polishing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If adhesion or barrier layers are used between conductive fill material and interlayer dielectric, then metal loss during planarization is prevented, but device complexity and manufacturing steps increase
Solution Approach 1:
The patent removes the adhesion or barrier layers from the structure entirely. Instead of using these intermediate layers, the invention employs ion implantation to modify the interlayer dielectric material directly, creating a compressed interface that prevents metal loss without requiring additional material layers.
Solution Approach 2:
The patent replaces the mechanical/adhesive function of adhesion or barrier layers with a physical compression mechanism achieved through ion implantation. The implanted ions create stress in the interlayer dielectric that mechanically compresses the conductive fill material against the dielectric, preventing gaps and metal loss during planarization.
2Manufacturing precision
If ion implantation is used to create compression stress and close gaps, then metal loss during CMP is prevented, but process complexity and manufacturing steps increase
Solution Approach 1:
The ion implantation process is performed before the chemical mechanical polishing (CMP) step to pre-compress the interface between the conductive fill material and interlayer dielectric. This preliminary action closes gaps and prevents metal loss during the subsequent CMP process, ensuring precise gap closure before the planarization step occurs.
3Ease of manufacture
If gaps and cracks exist between conductive fill material and interlayer dielectric, then manufacturing is simpler, but electrical properties degrade and structural damage occurs from process chemistries
Solution Approach 1:
The patent changes the physical and chemical parameters of the interlayer dielectric material through ion implantation. The implanted ions modify the dielectric's stress state, creating compression that closes gaps and cracks at the interface. This parameter change transforms the interface from a gap-prone structure to a tightly compressed, reliable connection without complicating the manufacturing process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces defects and maintains the integrity of conductive structures by preventing slurry penetration and chemical interaction, ensuring stable electrical properties and structural integrity.
Implementation Method 1
implantation is employed to create compression stress between the conductive fill material and interlayer dielectric, closing gaps and cracks
Data Source
AI summary
The present disclosure provides methods for forming conductive features in a dielectric layer without using adhesion layers or barrier layers and devices formed thereby. In some embodiments, a structure comprising a dielectric layer over a substrate, and a conductive feature disposed through the dielectric layer. The dielectric layer has a lower surface near the substrate and a top surface distal from the substrate. The conductive feature is in direct contact with the dielectric layer, and the dielectric layer comprises an implant species. A concentration of the implant species in the dielectric layer has a peak concentration proximate the top surface of the dielectric layer, and the concentration of the implant species decreases from the peak concentration in a direction towards the lower surface of the dielectric layer.