Implanted STI Protection Layer for GAA Sacrificial Etch Stability
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Solution Overview
Problem
The reduction in minimum feature sizes in semiconductor devices leads to issues such as undesirable recessing of Shallow Trench Isolation (STI) regions during the removal of sacrificial layers, causing increased effective capacitance and out fringe capacitance, which affects the performance of Gate-All-Around (GAA) transistors.
Innovation Solution
A protection layer is formed through implantation and directional plasma treatment to prevent STI regions from being recessed during the removal of sacrificial layers, using dopants like nitrogen, carbon, and oxygen to create a higher concentration layer that enhances etching selectivity and protects the STI regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If minimum feature sizes are reduced to increase integration density, then more components can be integrated into a given area, but STI regions experience undesirable recessing during sacrificial layer removal
Solution Approach 1:
A protection layer is introduced as an intermediary between the STI region and the etching environment. This protection layer, formed by implanting sacrificial layer material onto the STI region, acts as a mediator that prevents direct interaction between the etchant and the STI region, thereby preventing recessing while allowing the etching process to proceed for sacrificial layer removal.
Solution Approach 2:
The protection layer is formed in advance before the sacrificial layer removal process. By performing the implantation process to create the protection layer prior to etching, the STI region is pre-protected against the subsequent etching steps, preventing the harmful recessing effect before it can occur.
2Manufacturing precision
If protection layer is formed through implantation to prevent STI recessing, then STI region integrity is maintained, but process complexity increases
Solution Approach 1:
The implantation process serves multiple functions: it forms the protection layer on the STI region while simultaneously utilizing the existing sacrificial layer material. This multi-functional approach integrates the protection layer formation into the existing process flow, reducing the need for entirely separate process steps and mitigating the increase in process complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the undesirable increase in parasitic capacitance between conductive features by maintaining the integrity of STI regions, thereby improving the performance and reliability of GAA transistors.
Implementation Method 1
A protection layer is formed through implantation and directional plasma treatment to prevent STI regions from being recessed
Implementation Method 2
A protection layer is formed through implantation and directional plasma treatment to prevent STI regions from being recessed
Data Source
AI summary
A method includes forming a shallow trench isolation region aside of a protruding fin. The protruding fin includes a first semiconductor nanostructure and a second semiconductor nanostructure. A doping process is performed to dope a dopant into a top portion of the shallow trench isolation region to form a protection layer. The method further includes forming a dummy gate stack over the protruding fin, removing a sacrificial layer in the protruding fin to leave a space between the first semiconductor nanostructure and the second semiconductor nanostructure, forming a disposable interposer in the space. The dummy gate stack is then removed, followed by an etching process to remove the disposable interposer using an etchant. In the etching process, the protection layer is exposed to the etchant. A replacement gate stack is then formed, wherein a portion of the replacement gate stack is filled in the space.