Implicit Error Code Storage for Secure Memory Bit Protection

Solution Overview

Problem

Existing data processing apparatuses require explicit storage of additional bits for error detection and correction, which increases storage size and may compromise security by making these bits potentially visible, while also being inefficient in handling bit changes.

Innovation Solution

The apparatus employs error code generation circuitry that allows implicit storage of additional bits within the error code, enabling reconstruction of these bits during verification operations, thus reducing storage size and enhancing security by not explicitly storing sensitive information.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If additional bits are explicitly stored for error detection and correction, then error protection capability is improved, but storage size increases and security is compromised

Engineering Contradiction:

Improveerror protection capabilityVSAvoidstorage size

Core Design Contradiction:

ReliabilityVSQuantity of substance

Solution Approach 1:

The patent merges the additional protection bits with the existing error code by encoding them into the least significant bits of the error code words. Instead of storing separate protection bits, the system combines multiple functions (error detection and additional data protection) into a single integrated error code structure, thereby achieving improved error protection without increasing storage size.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The error code is designed to serve multiple functions simultaneously: traditional error detection and correction, plus storage of additional protection bits. By making the error code multi-functional, the system avoids the need for separate storage mechanisms, thus improving reliability while maintaining constant storage size.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Reliability

If additional bits are explicitly stored for error detection and correction, then error protection capability is improved, but security is worsened by making sensitive information visible

Engineering Contradiction:

Improveerror protection capabilityVSAvoidsecurity vulnerability

Core Design Contradiction:

ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent merges the additional protection bits with the existing error code by encoding them into the least significant bits of the error code words. Instead of storing separate protection bits, the system combines multiple functions (error detection and additional data protection) into a single integrated error code structure, thereby achieving improved error protection without increasing storage size.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The error code acts as an intermediary that hides the additional protection bits within its structure. Rather than storing sensitive bits in plain view, the system uses the error code as a mediator to encode and conceal these bits, improving security while maintaining error protection capabilities.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Reliability

If traditional error codes are used, then error detection is improved, but storage efficiency is worsened due to redundant bits

Engineering Contradiction:

Improveerror detection capabilityVSAvoidstorage efficiency

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The patent merges the additional protection bits with the existing error code by encoding them into the least significant bits of the error code words. Instead of storing separate protection bits, the system combines multiple functions (error detection and additional data protection) into a single integrated error code structure, thereby achieving improved error protection without increasing storage size.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS8694862B2Data processing apparatus using implicit data storage data storage and method of implicit data storage

Publication Date: 2014.04.08 ARM LTD

AI summary

A data processing apparatus is provided having error code generation circuitry configured to generate an error code associated with a received data value, such that a bit change in the received data value can be known about by reference to the error code. Stored data values are stored in a data store and associated error codes are stored in an error code store. Error checking circuitry performs a verification operation on a stored data value and an associated error code to determine if an error has occurred in at least one of the stored data value and the associated error code during storage. The received data value comprises at least one additional bit with respect to the stored data value and the error checking circuitry is configured to reconstruct the at least one additional bit by reference to the stored data value and the associated error code.