Implicit Geometry Electrical Modeling in 3D Virtual Fabrication
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Solution Overview
Problem
Conventional electrical simulation tools are inadequate for modeling the complex electrical behavior of modern semiconductor devices, as they require manual mesh generation and are limited to small regions, failing to account for process variations and interactions between widely separated processes in integrated circuit fabrication.
Innovation Solution
A virtual fabrication environment that uses implicit geometry representations to model semiconductor device structures, allowing for the direct computation of electrical behavior without mesh generation, enabling the simulation of full technology suites and exploring process variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional electrical simulation tools are used, then electrical behavior can be simulated, but manual mesh generation is required and the simulation is limited to small regions
Solution Approach 1:
The patent extracts the mesh generation step from the simulation process by using level-set methods to directly compute electrical behavior from geometric descriptions without requiring manual mesh creation. This eliminates the complex manual mesh generation step while preserving simulation accuracy.
Solution Approach 2:
The patent introduces level-set functions as an intermediary representation between geometric models and electrical simulation. Instead of directly meshing complex geometries, the level-set method provides a continuous mathematical representation that can be directly used for electrical behavior computation, avoiding mesh generation complexity.
2Reliability
If conventional simulation tools are used, then electrical behavior can be modeled, but the process cannot account for interactions between widely separated processes in fabrication
Solution Approach 1:
The patent merges the geometric modeling and electrical simulation processes into a unified framework. By using level-set methods that directly compute electrical behavior from geometric descriptions, the system can integrate multiple fabrication processes and account for their interactions without requiring separate analysis steps.
Solution Approach 2:
The patent creates a universal simulation framework that can handle various fabrication processes and electrical behavior types within a single system. The level-set approach provides a multi-functional capability to model different process variations and their interactions across widely separated processes.
3Adaptability or versatility
If full technology suites are to be simulated, then comprehensive electrical behavior can be analyzed, but conventional tools are limited to small regions
Solution Approach 1:
The patent transitions from local, region-by-region simulation to a global simulation approach by using level-set methods that can handle entire device structures. This dimensional shift in the simulation approach allows comprehensive analysis of full technology suites rather than being constrained to small regions.
4Measurement precision
If fabrication experimental wafers are fabricated to measure electrical performance, then accurate electrical behavior data can be obtained, but significant time and money are required
Solution Approach 1:
The patent creates virtual copies of fabrication processes and device structures through computational modeling. Instead of physically fabricating experimental wafers, the system uses level-set-based simulation to predict electrical behavior, providing accurate measurement data without the time and cost of physical fabrication.
Data Source
AI summary
Modeling of electrical behavior during the virtual fabrication of a semiconductor device structure is discussed. Electrical behavior occurring in a designated region of a semiconductor device structure may be determined during the virtual fabrication process. For example, resistance or capacitance values may be determined within a modeling domain of interest.