Imprint Lithography Pitch Multiplication for Sub-30nm Features
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Solution Overview
Problem
Current lithographic techniques, such as photolithography and electron beam lithography, face limitations in reducing feature sizes below 30-50 nm due to optical constraints and high equipment costs, hindering further miniaturization of integrated circuits.
Innovation Solution
The use of contact imprint lithography with pitch multiplication techniques to form imprint reticles, which involve creating patterns of closely spaced features by transferring a pattern of spacers and pillars through multiple etching steps, allowing for the formation of densely packed and isolated features on semiconductor substrates with feature spacings below conventional lithographic limits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional lithography techniques (photolithography or electron beam lithography) are used to pattern features, then manufacturing precision can be maintained at current limits, but feature size reduction below 30-50 nm becomes impossible or prohibitively expensive
Solution Approach 1:
The patent applies pitch multiplication by segmenting the patterning process into multiple steps. First, a preliminary pattern is formed using conventional lithography, then spacer material is deposited and etched to create additional features between the original patterns. This segmentation allows achieving sub-30nm pitch by combining multiple coarser lithography steps, effectively bypassing the single-step lithography resolution limit.
Solution Approach 2:
The method uses preliminary patterning to create a template structure before forming the final dense pattern. The preliminary pattern serves as a foundation that guides subsequent spacer formation and pattern transfer steps. This preliminary action enables the system to work within conventional lithography capabilities while preparing the structure for ultra-fine feature formation through additional processing steps.
2Manufacturing precision
If electron beam lithography is used to achieve lower feature size limits of about 10 nm, then manufacturing precision improves, but equipment cost and complexity increase significantly
Solution Approach 1:
The patent creates a preliminary pattern copy using conventional, cost-effective lithography equipment. This preliminary pattern is then used as a template to generate the final high-precision pattern through spacer formation and pattern transfer. By copying the pattern through multiple steps rather than requiring single-step high-resolution lithography, the method achieves 10nm-scale precision using inexpensive equipment.
Solution Approach 2:
The method replaces the need for expensive electron beam lithography equipment with a combination of conventional photolithography and chemical/physical processing steps. Instead of relying on high-energy electron beams for direct patterning, the system uses optical lithography followed by spacer deposition and etching processes to achieve the same sub-30nm resolution at lower equipment cost.
3Productivity
If feature spacing is reduced to increase density, then productivity and integration capacity improve, but lithographic resolution requirements become unattainable with conventional methods
Solution Approach 1:
The patent implements nested patterning where a preliminary pattern is embedded within the structure, and additional features are nested between these preliminary features through spacer formation. This nested approach allows creating densely packed features at sub-30nm spacing by nesting multiple pattern generations together, achieving high integration density without requiring single-step lithography at unattainable resolution levels.
Data Source
AI summary
A reticle comprising isolated pillars is configured for use in imprint lithography. In some embodiments, on a first substrate a pattern of pillars pitch-multiplied in two dimensions is formed in an imprint reticle. The imprint reticle is brought in contact with a transfer layer overlying a series of mask layers, which in turn overlie a second substrate. The pattern in the reticle is transferred to the transfer layer, forming an imprinted pattern. The imprinted pattern is transferred to the second substrate to form densely-spaced holes in the substrate. In other embodiments, a reticle is patterned by e-beam lithography and spacer formations. The resultant pattern of closely-spaced pillars is used to form containers in an active integrated circuit substrate.