Imprint-Formed Resin Vias for High-Aspect-Ratio Electronic Components

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Solution Overview

Problem

Conventional methods for forming conductive vias through sealing resin layers in semiconductor devices are inefficient due to the large number of processes involved, particularly when trying to create vias with small widths and specific heights using electroplating.

Innovation Solution

A method utilizing an imprint process to form via holes in a curable sealing resin layer, followed by curing, filling with a conductor precursor, and forming a conductive via by heating the precursor, thereby reducing the number of processes and improving efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If conventional electroplating method is used to form conductive vias, then via formation is achieved, but the number of processes is large and production efficiency is low

Engineering Contradiction:

Improveproduction efficiencyVSAvoidnumber of processes

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent combines multiple separate processes (resist film formation, via hole formation, plating, resist removal, seed layer removal) into a single imprint process that forms via holes directly in the sealing resin layer. This merging of processes dramatically reduces the total number of steps required to form conductive vias, thereby improving production efficiency.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The imprint process performs preliminary action by forming via holes with precise dimensions directly in the sealing resin layer before any other processing steps. This preliminary via hole formation eliminates the need for subsequent resist film formation and pattern alignment steps, streamlining the overall manufacturing process.

Inventive Principle:

Principle #10Preliminary action

2Manufacturing precision

If electroplating is used to form conductive vias, then via formation is achieved, but it is difficult to form vias with small width and certain height

Engineering Contradiction:

Improvevia width and height precisionVSAvoiddifficulty of via formation

Core Design Contradiction:

Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The patent replaces the electrochemical plating process with a mechanical imprint process for via hole formation. The imprint method uses a mold to directly press and form via holes with precise dimensions in the sealing resin layer, eliminating the complexity of electroplating control and achieving better dimensional precision for small-width, high-aspect-ratio vias.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent changes the formation method parameter from electrochemical deposition (electroplating) to mechanical displacement (imprint). This parameter change enables precise control of via hole dimensions (width and height) by controlling the imprint pressure and mold geometry, making it easier to form vias with small widths and specific heights.

Inventive Principle:

Principle #35Parameter changes

3Reliability

If multiple processes are used for via formation, then via formation is achieved, but treatment at high temperature is required

Engineering Contradiction:

Improvevia formation reliabilityVSAvoidhigh-temperature treatment

Core Design Contradiction:

ReliabilityVSTemperature

Solution Approach 1:

The patent replaces thermal curing and high-temperature plating processes with a mechanical imprint process that forms via holes at lower temperatures. The imprint method uses controlled mechanical pressure to displace and form via holes in the uncured or partially cured sealing resin, eliminating the need for repeated high-temperature treatments.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method allows for the efficient and easy manufacturing of electronic component devices with conductive vias penetrating sealing resin layers, using fewer steps and enabling the formation of vias with high aspect ratios without high-temperature treatments.

Implementation Method 1

forming a via hole extending in a thickness direction of a curable sealing resin layer provided on a base material by an imprint method of pressing a mold into the sealing resin layer from a side opposite to the base material

Methodology Applied

Scientific EffectMechanical pressure: Pressure Increase

Implementation Method 2

curing the sealing resin layer

Methodology Applied

Scientific EffectCuring: Photopolymerisation

Implementation Method 3

forming a conductive via by heating the conductor precursor filled in the via hole

Methodology Applied

Scientific EffectHeating: Heating

Data Source

PatentUS12315760B2Method for manufacturing electronic component device

Publication Date: 2025.05.27 RESONAC CORP

AI summary

Disclosed is a method for manufacturing an electronic component including: forming a via hole extending in a thickness direction of a curable sealing resin layer provided on a base material by an imprint method of pressing a mold into the sealing resin layer from a side opposite to the base material; curing the sealing resin layer; filling the via hole with a conductor precursor; and forming a conductive via by heating the conductor precursor filled in the via hole.