In-cell Touch Panel Parasitic Capacitance Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In self-capacitance type touch control structures, parasitic capacitance between touch sensing electrodes and connecting wires interferes with signal-to-noise ratio, and increasing the thickness of the insulating layer to reduce this capacitance also reduces the storage capacitor, affecting the ability to maintain pixel charge and display grayscale correctly.
Innovation Solution
The in-cell type touch panel design includes an array substrate with a connecting wire, touch sensing electrode, and pixel electrode stacked from bottom to top, allowing the thickness of the first insulating layer between the touch sensing electrode and the connecting wire to be increased without altering the relative distance between the touch sensing electrode and the pixel electrode, thereby reducing parasitic capacitance while maintaining storage capacitor integrity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the thickness of the insulating layer between the touch sensing electrode and the connecting wire is increased to reduce parasitic capacitance, then the signal-to-noise ratio is improved, but the storage capacitor is reduced, affecting the ability to maintain pixel charge and display grayscale correctly
Solution Approach 1:
The patent introduces a third dimension (vertical stacking) to resolve the contradiction. By stacking the connecting wire, touch sensing electrode, and pixel electrode in different layers with insulating layers between them, the design increases the horizontal separation between the connecting wire and touch sensing electrode without reducing the vertical distance to the pixel electrode. This dimensional change allows parasitic capacitance to be reduced while maintaining storage capacitor integrity.
Solution Approach 2:
The patent uses insulating layers as intermediary elements between the connecting wire and touch sensing electrode. These insulating layers act as mediators that reduce the parasitic capacitance between conductive elements while allowing the touch sensing electrode to maintain its proper electrical relationship with the pixel electrode through controlled via holes, thus resolving the contradiction between reducing parasitic capacitance and maintaining storage capacitor function.
2Measurement precision
If the thickness of the insulating layer is increased to reduce parasitic capacitance, then touch detection accuracy is improved, but the structural complexity and manufacturing difficulty increase
Solution Approach 1:
The patent resolves the contradiction by moving the separation between connecting wire and touch sensing electrode from the vertical dimension to the horizontal dimension through layer stacking. This allows increased insulating layer thickness for reducing parasitic capacitance without adding excessive structural complexity, as the layered approach is a standard manufacturing technique in display technology.
3Measurement precision
If the thickness of the insulating layer is increased to reduce parasitic capacitance, then signal-to-noise ratio is improved, but the manufacturing precision requirements increase
Solution Approach 1:
The patent addresses the manufacturing precision challenge by implementing the connecting wire, touch sensing electrode, and pixel electrode in separate stacked layers. This vertical separation allows for standardized layer formation processes with established alignment techniques, reducing the impact of alignment errors compared to horizontal positioning. The via holes providing electrical connections are formed through precise photolithography and etching processes that are well-established in display manufacturing.
4Measurement precision
If the thickness of the insulating layer is increased to reduce parasitic capacitance, then touch control performance is improved, but the production cost increases
Solution Approach 1:
The patent resolves the cost contradiction by using a layered stacking architecture that leverages existing manufacturing capabilities in the display industry. The vertical layering approach allows for standardized deposition and patterning processes that are already well-established, avoiding the need for expensive new equipment or processes. The increased insulating layer thickness can be achieved through conventional deposition techniques without significantly increasing production cost.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the signal-to-noise ratio of the touch panel by reducing parasitic capacitance without impacting the storage capacitor, ensuring accurate touch detection and proper image display.
Implementation Method 1
parasitic capacitance between touch sensing electrodes and connecting wires interferes with signal-to-noise ratio
Implementation Method 2
uses the principle of self capacitance to realize the detection of finger touch position
Data Source
AI summary
An in-cell type touch panel, a manufacturing method thereof and a LCD device are provided. The touch panel includes an array substrate including: a glass substrate, thin film transistors, a planarization layer overlying the thin film transistors, a connecting wire on the planarization layer, a first insulating layer overlying the connecting wire, a touch sensing electrode on the first insulating layer, a second insulating layer overlying the touch sensing electrode and a pixel electrode on the second insulating layer. The connecting wire is connected to the touch sensing electrode by a first via hole, and the pixel electrode is connected to one of the thin film transistors by a second via hole. The touch sensing electrode further is configured as a common electrode, and during a displaying time period of an image frame, the touch sensing electrode transmits a common voltage and a touch control signal in time division manner.