In-line Packet Processing Pipeline for Network Error Recovery

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

High-speed networks experience increased packet loss and corruption, leading to reduced throughput due to the inefficiency of traditional per-flow resend mechanisms and centralized, slow software routines for error detection and recovery.

Innovation Solution

Implementing packet processing pipelines with dedicated hardwired logic to construct packets containing link telemetry information and ALARM messages, allowing for immediate error detection and recovery by forwarding statistics directly to endpoints and network management systems, bypassing serial polling and software analysis.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional per-flow resend mechanisms and centralized software routines are used for error detection and recovery, then system reliability is maintained, but network throughput decreases due to timeout waiting and serial polling delays

Engineering Contradiction:
Improveerror recovery capabilityVSAvoidnetwork throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the centralized error detection and recovery function into distributed components at network endpoints. Each endpoint independently monitors its own flows and autonomously implements resend mechanisms, eliminating the need for serial polling by centralized software routines and timeout waiting, thereby maintaining reliability while improving throughput

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent replaces the mechanical system of serial polling and timeout-based resend with an event-driven mechanism. Error detection is triggered by actual error events at endpoints rather than periodic polling, and recovery actions are immediately initiated without waiting for centralized software processing, thus eliminating delays and improving network throughput

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If centralized software routines are used for statistics collection and recovery intervention, then comprehensive error monitoring is achieved, but response time increases due to serial polling and software analysis delays

Engineering Contradiction:
Improveerror monitoring capabilityVSAvoiderror detection and recovery time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements preliminary error monitoring capabilities at network endpoints, where statistics are collected and analyzed locally in real-time rather than waiting for centralized polling. This allows errors to be detected and recovery actions to be initiated immediately without the delay of serial polling and software analysis by centralized routines

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces endpoint devices as intermediaries between network links and the centralized management system. These intermediaries perform local statistics collection, error detection, and initial recovery interventions, reducing the need for frequent centralized polling and software analysis while maintaining comprehensive monitoring capability

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20230239196A1Network error reporting and recovery with in-line packet processing pipeline
Publication Date: 2023.07.27 INTEL CORP
  • US20230239196A1 patent drawing
  • US20230239196A1 patent drawing
  • US20230239196A1 patent drawing

AI summary

An apparatus is described. The apparatus includes electronic circuitry to support multiple flows within a network. The electronic circuitry to determine respective telemetry information for the multiple flows and inject an alarm message into a particular one of the multiple flows upon an alarm condition being reached for the particular one flow. The alarm message includes a multi-bit error code that describes the alarm condition. The multi-bit error code is one of multiple, possible multi-bit error codes.