In-Memory Checksum Verification for Reliable Vector-Matrix Computing

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Solution Overview

Problem

Existing in-memory computing devices lack efficient methods for detecting errors and ensuring functional integrity, particularly in applications like artificial intelligence and neural networks, where reliability and security are critical.

Innovation Solution

Implementing a checking device within or adjacent to the in-memory computing device, utilizing a processor or dedicated hardware comparator to compare checksums with reference checksums, and employing bitwise AND functions with inverted checksums to verify correct operation, potentially using additional in-memory computing devices for simultaneous processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a checking device is added to the in-memory computing device, then error detection capability is improved, but device complexity increases

Engineering Contradiction:
Improveerror detection capabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The checking device is merged with the in-memory computing device by integrating it into the same substrate or carrier. The checking device shares physical space and resources with the computing device, allowing error detection functionality to be added without significantly increasing overall device complexity. This merging approach enables the system to maintain compact configuration while gaining reliability through checksum verification capabilities.

Inventive Principle:
Principle #5Merging (Combining)

2Reliability

If checksum verification is implemented, then functional integrity is improved, but processing time increases

Engineering Contradiction:
Improvefunctional integrityVSAvoidprocessing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

Checksums are pre-calculated and stored in the in-memory computing device before actual computational tasks are performed. The checking device retrieves and verifies these pre-computed checksums during or after processing, rather than calculating them in real-time. This preliminary action approach enables functional integrity verification without adding significant processing time to the main computational workload.

Inventive Principle:
Principle #10Preliminary action

3Device complexity

If the checking device is integrated into the same substrate, then device configuration is simplified, but error detection coverage is reduced

Engineering Contradiction:
Improvedevice configurationVSAvoiderror detection coverage
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The checking device is designed as a separate functional unit that can be integrated into the same substrate as the in-memory computing device. This segmentation allows the checking device to operate independently and verify checksums for different memory regions or computational units. The modular design enables comprehensive error detection coverage across the entire device while maintaining simplified overall configuration through shared substrate integration.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20260056832A1Method and apparatus for processing checksums for an in-memory computing device
Publication Date: 2026.02.26 ROBERT BOSCH GMBH
  • US20260056832A1 patent drawing
  • US20260056832A1 patent drawing
  • US20260056832A1 patent drawing

AI summary

A computer-implemented method for processing checksums for an in-memory computing device for carrying out vector-matrix multiplications. The method includes: determining at least one checksum of the in-memory computing device; checking the at least one checksum by means of a checking device.