In-Memory Parallel Comparison Circuit Reduces Data Transfer Power

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Solution Overview

Problem

Existing memory systems require significant power and time to perform comparison operations, as they often need to transfer data between memory arrays and processing resources via buses, leading to inefficiencies in both energy consumption and processing speed.

Innovation Solution

The implementation of a memory apparatus that allows for parallel comparison operations within the memory array itself, using sensing circuitry to compare elements without transferring data via input/output lines, thereby reducing the need for external processing resources and minimizing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If data is transferred between memory arrays and processing resources via buses to perform comparison operations, then the operations can be executed using external processing resources, but the power consumption increases and processing time increases

Engineering Contradiction:
Improvecomparison operation executionVSAvoidpower consumption
Core Design Contradiction:
Ease of operationVSUse of energy by moving object

Solution Approach 1:

The patent combines the memory array and processing capabilities by enabling comparison operations to be performed directly within the memory array using sensing circuitry. This merging eliminates the need for separate external processing resources and data transfer buses, thereby reducing power consumption while maintaining operational capability.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent extracts the comparison operation functionality from external processing resources and relocates it directly into the memory array. By taking out the data transfer requirement and performing operations in-place, the system reduces power consumption associated with data movement while preserving the essential comparison capability.

Inventive Principle:
Principle #2Taking out (Extraction)

2Ease of operation

If data is transferred between memory arrays and processing resources via buses to perform comparison operations, then the operations can be executed using external processing resources, but the processing time increases

Engineering Contradiction:
Improvecomparison operation executionVSAvoidprocessing time
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The patent merges memory storage and processing functions by enabling comparison operations to execute directly within the memory array. This integration eliminates the time required for data transfer via buses, significantly reducing processing time while maintaining the ability to perform comparison operations.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent extracts the data transfer step from the comparison operation process and eliminates it by performing operations in-place within the memory array. This removal of the transfer step directly reduces processing time while preserving the core comparison functionality.

Inventive Principle:
Principle #2Taking out (Extraction)

3Use of energy by moving object

If sensing circuitry is used to perform comparison operations within the memory array without transferring data via input/output lines, then power consumption is reduced, but the device complexity increases

Engineering Contradiction:
Improvepower consumptionVSAvoidmemory array structure
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The patent makes the sensing circuitry multi-functional by enabling it to perform both its traditional data sensing role and comparison operations. This universality allows the existing sensing circuitry to handle multiple tasks, reducing the need for additional dedicated components and thereby limiting the increase in device complexity while achieving power reduction.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent enables the memory array to serve itself by performing comparison operations internally without requiring external processing resources. The sensing circuitry uses the data already present in the memory array to perform comparisons, allowing the system to self-service and reduce power consumption without adding significant external complexity.

Inventive Principle:
Principle #25Self-service

4Reliability

If comparison operations are performed by transferring data to external processing resources, then the operations can be executed using dedicated processing units, but the reliance on external resources increases

Engineering Contradiction:
Improveoperation executionVSAvoidexternal resource dependency
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges memory and processing functions by enabling comparison operations to be performed within the memory array itself. This integration reduces reliance on external processing resources while maintaining reliable operation execution, as the memory array becomes self-sufficient for comparison tasks.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent enables the memory array to perform comparison operations independently without requiring external processing resources. This self-service capability reduces external resource dependency while maintaining operational reliability, as the memory array can execute comparison operations using its own sensing circuitry.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS9940985B2Comparison operations in memory
Publication Date: 2018.04.10 MICRON TECHNOLOGY INC
  • US9940985B2 patent drawing
  • US9940985B2 patent drawing
  • US9940985B2 patent drawing

AI summary

The present disclosure includes apparatuses and methods related to performing comparison operations in memory. An example apparatus can include a first group of memory cells coupled to a first access line and configured to store a plurality of first elements, and a second group of memory cells coupled to a second access line and configured to store a plurality of second elements. The apparatus can include a controller configured to cause the plurality of first elements to be compared with the plurality of second elements by controlling sensing circuitry to perform a number of operations without transferring data via an input/output (I/O) line, and the plurality of first elements and the plurality of second elements can be compared in parallel.