In-Memory Computation for Machine Learning Latency

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Solution Overview

Problem

Current machine learning processing techniques face inefficiencies due to high latency and bandwidth requirements, particularly in large-scale distributed systems, where data transfer between RAM and processors becomes a significant bottleneck, limiting performance and energy efficiency.

Innovation Solution

The implementation of in-memory computation using bit-arrays and array-wide bitwise operations within DRAM or other memory technologies like Phase Change Memory, allowing for direct processing within memory without transferring data to the processor, utilizing techniques such as Ambit, Pinatubo, and IDAO to perform bitwise operations efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data is transferred between RAM and processor for machine learning computation, then computation can be performed, but latency increases and bandwidth requirements become a bottleneck

Engineering Contradiction:
Improvecomputation throughputVSAvoiddata transfer latency
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent merges the storage function (RAM) and computation function (processor) by implementing computation logic directly within the memory structure. Bitwise operations are performed on data while it remains stored in memory cells, eliminating the need to transfer data between separate storage and processing units. This integration directly resolves the latency issue by removing the data transfer step while maintaining high computation throughput through parallel bitwise operations.

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If data is transferred between RAM and processor, then computation can be performed, but bandwidth requirements increase creating a bottleneck

Engineering Contradiction:
Improvecomputation throughputVSAvoiddata transfer bandwidth
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The memory structure performs computation operations on its own stored data without requiring external processor intervention for each operation. The bitwise computation logic is embedded within the memory cells themselves, allowing them to process their own contents directly. This self-service capability eliminates the need for high-bandwidth data transfer to external processors, as computation is performed in-place within the memory structure.

Inventive Principle:
Principle #25Self-service

3Productivity

If traditional processing techniques are used for large-scale machine learning, then computation can be performed, but energy efficiency decreases

Engineering Contradiction:
Improvelearning throughputVSAvoidenergy consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

By combining storage and computation functions into a single integrated structure, the patent eliminates energy-consuming data transfer operations between separate memory and processing units. The bitwise operations are performed directly on data residing in memory cells using embedded logic, significantly reducing the energy required for computation compared to traditional architectures that require continuous data movement between RAM and CPU/GPU units.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20220366319A1In-memory computation of algebraic machine learning
Publication Date: 2022.11.17 ALGEBRAIC AI SL
  • US20220366319A1 patent drawing
  • US20220366319A1 patent drawing
  • US20220366319A1 patent drawing

AI summary

In-memory computation of algebraic machine learning, such as computation of selected operations on data directly in RAM memory without need of transferring the data to a processor, enables higher internal bandwidth, more parallelism, and better energy efficiency, e.g., when performing operations related to large scale machine learning.