In-Memory Compute Timing Using RAS-Controlled Memory Arrays
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Solution Overview
Problem
Existing computing systems face inefficiencies in processing performance and power consumption due to the need for external communication between processing resources and memory arrays, which can be improved by integrating processing capabilities directly within the memory device.
Innovation Solution
Implementing a Processing in Memory (PIM) capable device that performs logical operations directly on data stored in memory arrays using sensing circuitry, including a row address strobe component and manager to coordinate timing of compute operations, reducing the need for external processing resources.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If processing resources are external to memory array, then device complexity is reduced, but processing performance deteriorates due to external communication overhead
Solution Approach 1:
The patent merges processing resources with the memory array by integrating functional unit circuitry directly into the memory device structure. This allows data processing to occur in-memory without requiring separate external processors, thereby improving processing performance while managing device complexity through integrated architecture.
Solution Approach 2:
The memory device is designed to perform multiple functions: data storage, data processing, and communication. The functional unit circuitry within the memory array enables the device to execute instructions and perform operations locally, making the memory system multi-functional and reducing dependency on external processing resources.
2Ease of manufacture
If processing resources are external to memory array, then manufacturing simplicity is maintained, but power consumption increases due to external data transfer
Solution Approach 1:
By combining processing capabilities with memory storage in a single integrated device, the patent reduces the need for data transfer between external components. This in-memory processing approach minimizes the energy consumption associated with moving data across external buses and connections while maintaining manufacturing feasibility through integrated circuit fabrication.
3Device complexity
If processing is performed externally, then in-memory operations are avoided, but operation cycle time increases
Solution Approach 1:
The integration of functional unit circuitry directly into the memory array enables processing operations to be performed locally on stored data without requiring external intervention. This eliminates the time delay associated with external data retrieval and processing, significantly reducing operation cycle time while managing device complexity through efficient in-memory architecture.
Data Source
AI summary
Apparatuses and methods are provided for processing in memory. An example apparatus includes a processing in memory (PIM) capable device having an array of memory cells and sensing circuitry coupled to the array. The PIM capable includes a row address strobe (RAS) component selectably coupled to the array. The RAS component is configured to select, retrieve a data value from, and input a data value to a specific row in the array. The PIM capable device also includes a RAS manager selectably coupled to the RAS component. The RAS manager is configured to coordinate timing of a sequence of compute sub-operations performed using the RAS component. The apparatus also includes a source external to the PIM capable device. The RAS manager is configured to receive instructions from the source to control timing of performance of a compute operation using the sensing circuitry.