In-Memory Defect Repair Circuit for Flexible Memory Reliability
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Solution Overview
Problem
Current memory repair processes require an external tester, leading to inconvenience and poor flexibility in identifying and fixing defective memory cells.
Innovation Solution
A defect repair circuit and method that includes a processor and memory, allowing for in-memory defect testing, storage of defect address information, and automatic repair of defective cells using internally generated address information without the need for an external tester.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an external tester is used for memory defect testing and repair, then measurement precision and reliability are improved, but device complexity and ease of operation deteriorate due to requiring external equipment
Solution Approach 1:
The memory device performs defect testing and repair operations autonomously using its own internal resources. The processor executes test instructions to identify defective cells and automatically performs repair operations using redundant cells, eliminating the need for external testers. This self-service approach improves operational convenience while maintaining reliability through the memory's inherent repair capabilities.
2Measurement precision
If an external tester is used for defect testing, then measurement precision is improved, but device complexity increases due to additional external equipment requirements
Solution Approach 1:
The testing and repair functions are extracted from the external tester and integrated directly into the memory device's processor. The processor now contains the capability to execute test instructions, identify defective cells, and perform repair operations internally. This extraction eliminates the need for complex external testing equipment while maintaining defect detection accuracy through the memory's built-in test and repair mechanisms.
3Ease of operation
If in-memory defect testing is implemented, then ease of operation is improved by eliminating external testers, but measurement precision may deteriorate
Solution Approach 1:
The processor executes test instructions and receives test results as feedback to identify defective memory cells. Based on this feedback, the system automatically determines which cells require repair and selects appropriate redundant cells for replacement. This feedback mechanism ensures accurate defect detection and precise repair operations, maintaining measurement precision while enabling convenient in-memory repair operations.
Data Source
AI summary
Disclosed are a defect repair circuit and a defect repair method. The defect repair circuit includes: a test module, configured to perform defect test on a memory cell array in a test module to determine a defective memory cell, and output test address information and defect flag signal corresponding to the memory cell; a defect information storage module, connected with the test module, configured to store defect address information responsive to the defect flag signal, the defect address information being the test address information of the defective memory cell, and further configured to output first address information responsive to an externally input repair selection signal, the first address information being one of multiple pieces of defect address information; and a repair module, connected with the defect information storage module and configured to repair a corresponding defective memory cell according to the received first address information.