In-Memory Dot Product Circuit for Low-Transfer Neural Computing

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Solution Overview

Problem

Conventional computer-based computations for operations like forward and backward propagation in neural networks are processor and memory intensive, requiring extensive data transfer between compute cores and memory arrays, which can be inefficient in terms of performance and power usage.

Innovation Solution

Implementing processing-in-memory (PIM) operations within a memory device, where a processor is integrated near or on the same chip as the memory array, allowing for dot product operations to be performed internally without external data transfer, using a memory array with bit lines, word lines, and a summing circuit to generate the product of two numbers.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data is transferred between external memory arrays and compute cores, then processing operations can be performed, but performance and power usage are degraded due to extensive data transfer requirements

Engineering Contradiction:
Improveprocessing performanceVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent combines memory storage and processing functions into a single integrated device. The memory array is directly coupled with processing circuitry including sense amplifiers that can perform computational operations, eliminating the need for separate external memory arrays and compute cores. This merging reduces data transfer distances and associated power consumption while maintaining processing capability.

Inventive Principle:
Principle #5Merging (Combining)

2Productivity

If data is transferred between external memory arrays and compute cores, then processing operations can be performed, but extensive external communications reduce processing efficiency

Engineering Contradiction:
Improveprocessing efficiencyVSAvoidsystem complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent integrates memory and processing functions within a single device, reducing system complexity by eliminating the need for separate external memory arrays and compute cores. The memory array is directly coupled with processing circuitry, allowing operations to be performed in-place without complex external communication interfaces and data transfer protocols.

Inventive Principle:
Principle #5Merging (Combining)

3Speed

If dot product operations are performed within the memory device, then processing speed is improved, but additional circuitry is required within the memory array

Engineering Contradiction:
Improveprocessing speedVSAvoidinternal circuitry complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The sense amplifiers in the memory device are designed to perform multiple functions: traditional memory read operations and computational operations such as dot product calculations. This multi-functionality allows the same circuitry to handle both storage retrieval and processing tasks, reducing the need for additional dedicated processing hardware while enabling in-memory computation.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12056599B2Methods of performing processing-in-memory operations, and related devices and systems
Publication Date: 2024.08.06 MICRON TECHNOLOGY INC
  • US12056599B2 patent drawing
  • US12056599B2 patent drawing
  • US12056599B2 patent drawing

AI summary

Methods, apparatuses, and systems for in-or near-memory processing are described. Bits of a first number may be stored on a number of memory elements, wherein each memory element of the number of memory elements intersects a bit line and a word line of a number of word lines. A number of signals corresponding to bits of a second number may be driven on the number of word lines to generate a number of output signals. A value equal to a product of the first number and the second number may be generated based on the number of output signals.