In-Memory Image Processor for Low-Power Color Correction

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Solution Overview

Problem

The increasing demand for higher image resolutions in mobile and remote devices leads to unreasonably high power consumption due to increased data access bandwidth from memory to processing units, necessitating a more efficient approach for color correction processing.

Innovation Solution

Implementing an image processor formed in an array of memory cells, such as ReRAM, which performs color correction operations directly in the memory chip using crossbar architecture to reduce power consumption and data access complexity by integrating arithmetic operations within the memory cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data access bandwidth from memory to processing units is increased to meet higher image resolution demands, then image processing capability is improved, but power consumption increases unreasonably

Engineering Contradiction:
Improveimage processing capabilityVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent merges memory and processing functions by implementing an image processor directly within the memory chip structure. The image processor is formed using memory cells themselves, combining storage and computation resources into a single integrated unit, thereby eliminating the need for separate data transfer between memory and processing units and reducing associated power consumption

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The memory cells are designed to serve multiple functions: they can store data in their traditional capacity while also performing image processing operations. The same memory cell array structure is used both for data storage and for executing pixel processing functions, making the system multi-functional and reducing overall component count

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Productivity

If additional components are added to improve image processing functionality, then processing capability is enhanced, but device complexity increases

Engineering Contradiction:
Improvecolor correction processing capabilityVSAvoidcomponent count
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent combines multiple functions (memory storage and image processing) into a single integrated structure. The image processor is formed within the memory chip using the existing memory cell array, eliminating the need for separate processing components and reducing overall device complexity

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The memory cell array is designed to perform both data storage and image processing operations. The same physical structure serves dual purposes: storing image data and performing color correction processing, thereby enhancing functionality without adding separate components

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12563152B2Image processor formed in an array of memory cells
Publication Date: 2026.02.24 LODESTAR LICENSING GROUP LLC
  • US12563152B2 patent drawing
  • US12563152B2 patent drawing
  • US12563152B2 patent drawing

AI summary

Apparatuses, systems, and methods related to an image processor formed in an array of memory cells are described. An image processor as described herein is configured to reduce complexity and power consumption and/or increase data access bandwidth by performing image processing in the array of memory cells relative to image processing by a host processor external to the memory array. For instance, one apparatus described herein includes sensor circuitry configured to provide an input vector, as a plurality of bits that corresponds to a plurality of color components for an image pixel, and an image processor formed in an array of memory cells. The image processor is coupled to the sensor circuitry to receive the plurality of bits of the input vector. The image processor is configured to perform a color correction operation in the array by performing matrix multiplication on the input vector and a parameter matrix to determine an output vector that is color corrected.