In-Memory Matrix Formation via Sub-Threshold Voltage Sensing
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Solution Overview
Problem
Existing computing systems that utilize a von Neumann architecture face inefficiencies in power consumption and system resource utilization due to the need to transfer data between memory cells and processing units, which can outweigh the energy consumed by processing operations and increase processing time.
Innovation Solution
The integration of circuitry for matrix formation directly on the same chip as the memory cells, allowing computational operations to be performed without transferring data to external processing circuitry, thereby reducing power consumption and system resource utilization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If data is transferred between memory cells and external processing units, then computational operations can be performed, but power consumption increases and processing time increases
Solution Approach 1:
The patent combines memory cells and processing circuitry into a single integrated structure where memory cells are directly coupled to sense circuitry and voltage circuitry on the same chip. This merging eliminates the need for data transfer between separate memory and processing units, thereby reducing power consumption while maintaining processing efficiency through in-memory computation capabilities
2Loss of time
If data is transferred between memory cells and external processing units, then computational operations can be performed, but processing time increases
Solution Approach 1:
By integrating sense circuitry and voltage circuitry directly with memory cells on the same chip, the patent enables computational operations to be performed without external data transfer. This merging of memory and processing functions reduces processing time while maintaining computational throughput through parallel in-memory operations
3Loss of energy
If circuitry is integrated on the same chip as memory cells, then power consumption decreases, but device complexity increases
Solution Approach 1:
The patent segments the integrated circuit into distinct functional blocks: memory cells, sense circuitry, and voltage circuitry. Each segment performs a specific function and is independently controllable, which manages device complexity through modular design while still achieving the power consumption benefits of integration
4Adaptability or versatility
If circuitry is integrated on the same chip as memory cells, then system resource utilization improves, but manufacturing complexity increases
Solution Approach 1:
The integrated circuit design provides multi-functionality by enabling both traditional memory operations and computational operations within the same structure. The sense circuitry can perform both reading functions and computational functions, improving system resource utilization while using standardized manufacturing processes for the integrated circuit
Data Source
AI summary
Apparatuses, methods, and systems for matrix formation for performing computational operations in memory are included. An embodiment includes a memory having a plurality of levels, wherein each of the plurality of levels includes a plurality of memory cells, voltage circuitry configured to apply sub-threshold voltages to the memory cells of each respective level, a plurality of sense lines, sense circuitry coupled to the plurality of sense lines, wherein the sense circuitry coupled to each respective sense line is configured to sense a state for each of the number of memory cells coupled to that respective sense line responsive to the voltage circuitry applying the sub-threshold voltages to the memory cells of each respective level, and processing circuitry configured to utilize the states for each of the memory cells to form a matrix and perform computational operations on data stored in the memory using the matrix.