In-Memory Multiplication Using Cell States to Cut AI Data Movement
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Solution Overview
Problem
Conventional memory devices face inefficiencies in processing large data sets due to limited memory bandwidth and high power consumption, particularly in AI applications, leading to bottlenecks in data movement and latency.
Innovation Solution
Integration of memory and processing in the same integrated circuit device, utilizing memory cells to perform inference computations through matrix vector multiplication and accumulation operations, reducing the complexity and power consumption of digital logic implementations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is transmitted from image sensors to microprocessors for processing, then processing capability is provided, but memory bandwidth is limited and power consumption increases
Solution Approach 1:
The patent merges memory and processing functions into a single integrated circuit device. The memory cell array performs both data storage and computation operations, eliminating the need for separate microprocessors to handle image data processing. This integration directly reduces power consumption by removing the data transmission bottleneck while maintaining processing capability through in-memory computation.
2Productivity
If data is transmitted from image sensors to microprocessors for processing, then processing capability is provided, but memory bandwidth is limited causing latency
Solution Approach 1:
By combining memory and processing in one device, the patent eliminates data transmission latency between sensors and microprocessors. Computation occurs directly within the memory cell array where data resides, enabling immediate processing without the time-consuming transfer steps inherent in conventional architectures.
Solution Approach 2:
The memory cell array performs self-computation using its own structure to execute multiplication and accumulation operations. The memory cells themselves perform the computational functions through their electrical characteristics, eliminating the need for external processing units and associated data transfer delays.
3Productivity
If specialized circuits like MAC units are used for multiplication, then computation performance is improved, but device complexity increases
Solution Approach 1:
The memory cell array performs computation using its inherent electrical properties without requiring separate specialized circuitry. The multiplication and accumulation operations are executed directly by the memory cells through voltage application and current measurement, eliminating the need for complex MAC units while maintaining high computation performance.
Solution Approach 2:
The memory cell array serves dual purposes: data storage and computation. The same physical structure that stores image data also performs multiplication and accumulation operations, eliminating the need for separate specialized circuits and reducing overall device complexity while maintaining processing capability.
Data Source
AI summary
Systems, methods, and apparatus related to memory devices that perform multiplication using logical states of memory cells. In one approach, a memory cell array has memory cells programmed to store weights for performing the multiplication. Voltages are applied to the memory cells. Each voltage represents one or more input bits to be multiplied by one of the weights. Output currents from the memory cells are accumulated in a common bitline. A sum of the output currents is digitized to provide a digital result. The digital results from several bitlines can be shifted based on bit significance and added to provide a final accumulation result from the multiplication.