In-Memory Heterogeneous Memory Pool for Low-Transfer Computing
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Solution Overview
Problem
Existing computing systems inefficiently spend a majority of power consumption on moving data between volatile and persistent memory, leading to reduced performance and increased power usage due to cache coherence issues, memory wall problems, and excessive data transfers.
Innovation Solution
Implementing a heterogeneous memory pool with embedded computational components, such as FPGAs, to offload computations directly onto persistent memory, reducing the need for data movement and enhancing data processing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If data is frequently transferred between volatile memory and persistent memory, then data accessibility and processing speed are improved, but power consumption increases significantly
Solution Approach 1:
The patent merges volatile memory and persistent memory into a unified memory space, allowing data to be accessed directly in persistent memory without frequent transfers to volatile memory. The computational component is integrated with the heterogeneous memory pool, enabling in-memory computations that eliminate the need to move data between memory types, thus reducing power consumption while maintaining processing speed.
Solution Approach 2:
The patent introduces a memory allocator and computational component as intermediaries between the host device and the heterogeneous memory pool. The memory allocator manages data placement and access across different memory types, while the computational component performs computations directly on data in persistent memory, reducing the need for data movement and associated power consumption.
2Productivity
If computations are performed on the host device, then processing capability is maintained, but data transfer overhead increases
Solution Approach 1:
The patent extracts the computational component from the host device and places it within the storage device's heterogeneous memory pool. This allows computations to be performed directly where the data resides, eliminating the need to transfer data between the host device and storage device, thus reducing data transfer time and overhead while maintaining computation performance.
Solution Approach 2:
The patent introduces a new architectural dimension by integrating computational capabilities directly into the storage device's memory pool. This creates a three-dimensional computing-storage-memory architecture where computations can be performed in-situ on stored data, eliminating the traditional sequential process of data transfer followed by computation on the host device.
3Ease of operation
If a unified memory space is implemented, then data accessibility is improved, but memory management complexity increases
Solution Approach 1:
The patent implements a memory allocator that automatically manages data placement, allocation, and access across the heterogeneous memory pool. The system self-manages the complexity of unified memory space by providing automated memory management functions, including handling data placement policies, memory allocation, and access routing, thereby improving data accessibility without requiring manual intervention to manage the underlying complexity.
Data Source
AI summary
A storage system includes a host device and a heterogeneous memory pool. The host device includes an application and a memory allocator stored thereon. The heterogeneous memory pool includes a volatile or non-volatile memory component, a persistent memory component, and a computational component. The computational component is in communication with the persistent memory component and the volatile or non-volatile memory component. The host device is in communication with the heterogeneous memory pool, via the memory allocator, to offload computations from the host device to the heterogenous memory pool.