In-Memory Spike Signal Processing for SNN Bandwidth Limits
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional computer-based computations for processing spiking events in spiking neural networks are processor- and memory-intensive, requiring significant data transfer between compute cores and memory arrays, which can exceed the bandwidth capabilities of conventional systems.
Innovation Solution
Implementing processing-in-memory (PIM) operations using a memory system with a spike signal filter and pointer table to perform arithmetical and logical operations directly on data stored in memory cells, reducing the need for external data transfer by emulating spiking neural networks on resistive memory arrays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional computer-based computations are used to process spiking events, then processing can be performed with standard processors and memory, but bandwidth requirements exceed the capabilities of conventional systems and power consumption increases
Solution Approach 1:
The patent merges processing functions with memory functions by implementing processing-in-memory (PIM) operations. The memory device performs arithmetical and logical operations directly on data stored in memory cells, eliminating the need for separate processing units and reducing data transfer bandwidth requirements between memory and processor.
Solution Approach 2:
The patent introduces a spike signal filter as an intermediary component that processes spiking events directly within the memory device. This filter receives pre-synaptic spike signals, performs filtering operations, and generates post-synaptic spike signals without requiring external processing, thereby reducing bandwidth requirements.
2Ease of operation
If data is transferred between compute cores and memory arrays, then processing operations can be executed, but the bandwidth requirements exceed conventional system capabilities
Solution Approach 1:
The memory device performs self-service by executing arithmetical and logical operations internally without requiring external processing. The PIM operations are performed directly within the memory device using the stored data, eliminating the need for data transfer to external compute cores and reducing bandwidth requirements.
3Adaptability or versatility
If processing operations are performed externally to memory, then standard processing architectures can be used, but power consumption increases due to extensive external communications
Solution Approach 1:
The patent merges processing functions with memory functions by implementing processing-in-memory (PIM) operations. The memory device performs arithmetical and logical operations directly on data stored in memory cells, eliminating the need for separate processing units and reducing data transfer bandwidth requirements between memory and processor.
Data Source
AI summary
Spiking events in a spiking neural network may be processed via a memory system. A memory system may store data corresponding to a group of destination neurons. The memory system may, at each time interval of a SNN, pass through data corresponding to a group of pre-synaptic spike events from respective source neurons. The data corresponding to the group of pre-synaptic spike events may be subsequently stored in the memory system.