In-Pixel Transconductance Amplifier for Faster CMOS Sensor Readout
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Solution Overview
Problem
The frame rate of CMOS image sensors is limited by the large capacitance of column output buses, which requires significant time for settling, leading to slower readout times and reduced maximum frame rates, especially in large focal plane arrays.
Innovation Solution
The implementation of an ADC structure with an in-pixel transconductance differential amplifier that supplies a current output to a column-wise AD current-sensing comparator, allowing for current-mode readout and reducing the need for long settling times by using a Ramp-Compare ADC architecture split between the pixel and column logic.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If in-pixel AD conversion is implemented to avoid long interconnects, then readout speed is improved, but device complexity and area requirements increase due to massive parallel circuitry
Solution Approach 1:
The patent divides the AD conversion function into two segments: in-pixel differential amplification and column-wise ADC. This segmentation allows the pixel to perform only amplification while the ADC operates in the column domain, reducing in-pixel complexity while maintaining fast readout speed.
Solution Approach 2:
The patent transitions from a fully distributed in-pixel ADC architecture to a hybrid architecture where ADC operations are moved to the column domain (vertical dimension). This dimensional shift reduces horizontal complexity within pixels while maintaining vertical signal flow for fast readout.
2Loss of time
If column capacitance is reduced to improve settling time, then frame rate is improved, but signal integrity and noise performance deteriorate
Solution Approach 1:
The patent changes the output parameter of the in-pixel amplifier from voltage to current mode. This parameter change allows the use of current-mode column buses with lower capacitance, reducing settling time while maintaining signal integrity through current-mode operation that is less susceptible to capacitive loading effects.
3Area of stationary object
If pixel size is reduced to increase array density, then area efficiency is improved, but the ability to accommodate readout circuitry deteriorates
Solution Approach 1:
The patent extracts the ADC circuitry from the pixel and relocates it to the column domain. This extraction allows pixels to be minimized to only essential photodetection and amplification functions, while ADC operations are performed externally in the column readout path.
Solution Approach 2:
The column-wise ADC serves multiple pixels simultaneously through time-multiplexed readout. This multi-functionality allows a single ADC to handle signals from multiple pixels, reducing the need for dedicated ADC circuitry in each pixel and enabling smaller pixel sizes.
Data Source
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AI summary
A pixel structure for an array of pixels that can be used in a CMOS imager is described comprising: photodiode for sensing incident light and for outputting an analog signal to a charge storage node or sense node or sample stage, a first in-pixel part of an ADC, connected to the charge storage or sense node or sample stage, for outputting a current signal as an input to a second part of the ADC which is not in-pixel, the first in-pixel part including a differential transconductance amplifier for comparing the analog signal with a reference signal.