Event-based computational pixel imagers
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional imaging arrays, such as CMOS and CCD devices, face limitations in dynamic range and efficiency in processing and transmitting image data, particularly in high-dynamic-range and event-based imaging applications.
Innovation Solution
A computational pixel imaging apparatus with integrated in-pixel digitization circuitry, including multiple counters and current-to-frequency converters, enables on-chip signal processing, infinite dynamic range sensing, and event-based imaging by accumulating and processing counts within the pixel array, allowing for efficient data handling and reduced latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional CMOS or CCD imaging arrays are used to accumulate charge on capacitors at each pixel, then the imaging function is achieved, but the dynamic range is limited and data transmission requirements are high
Solution Approach 1:
The patent merges multiple counters (first counter for integrating signal, second counter for filtering) within each pixel unit cell, combining signal accumulation and processing functions in one location. This integration reduces the need for external processing and minimizes data transmission requirements while extending dynamic range through coordinated counter operation.
Solution Approach 2:
Each pixel unit cell is designed with multi-functional capability, where the same hardware structure (photodetector, counters, and circuitry) can perform both signal integration and spatial/temporal filtering operations. This universal design allows a single pixel structure to handle multiple imaging tasks, reducing overall system complexity and data transmission needs.
2Productivity
If digital focal plane arrays with multiple counters per unit cell are implemented for on-chip signal processing, then processing efficiency is improved, but device complexity increases
Solution Approach 1:
The imaging array is segmented into multiple independent unit cells, each containing its own photodetector and counter structures. This segmentation distributes the processing load across many simple, identical modules rather than requiring a few complex processing units, improving overall processing efficiency while keeping individual pixel complexity manageable.
Solution Approach 2:
The patent implements a nested structure where multiple counters are integrated within each pixel unit cell, which itself is part of a larger two-dimensional array. The first counter is nested within the pixel to perform integration, while the second counter is nested to perform filtering, creating a hierarchical organization that improves processing efficiency without proportionally increasing overall device complexity.
3Quantity of substance
If in-pixel digitization and signal processing are implemented, then data transmission requirements are reduced, but power consumption increases
Solution Approach 1:
The patent implements partial processing within each pixel, where only essential functions (signal integration and basic filtering) are performed in-pixel using counters. More complex processing operations are left for external systems, creating a balanced approach that reduces data transmission requirements without excessively increasing power consumption from full in-pixel processing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances dynamic range capability, reduces data transmission requirements, and improves power efficiency, enabling high-speed, low-latency imaging with increased dynamic range and reduced power consumption.
Implementation Method 1
A detector array includes a plurality of photodetectors arranged in a two-dimensional array and configured to receive signals
Data Source
Figure 1A~1B
Figure 2~3A
Figure 3B
AI summary
A computational pixel imaging device that includes an array of pixel integrated circuits for event-based detection and imaging. Each pixel may include a digital counter that accumulates a digital number, which indicates whether a change is detected by the pixel. The counter may count in one direction for a portion of an exposure and count in an opposite direction for another portion of the exposure. The imaging device may be configured to collect and transmit key frames at a lower rate, and collect and transmit delta or event frames at a higher rate. The key frames may include a full image of a scene, captured by the pixel array. The delta frames may include sparse data, captured by pixels that have detected meaningful changes in received light intensity. High speed, low transmission bandwidth motion image video can be reconstructed using the key frames and the delta frames.