In-Pixel Digital Gain and Offset Corrections in DROIC
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Solution Overview
Problem
Conventional digital imaging techniques require significant power and electronics complexity for high bandwidth memory interfaces to perform pixel-wise gain and offset corrections, which contributes to camera SWaP (size, weight, and power) constraints.
Innovation Solution
A method and system where gain and offset corrections are performed separately in each pixel pitch of a digital read-out integrated circuit (DROIC) using binary counters and registers, allowing for immediate correction during frame integration without the need for frequent DRAM access, with registers loaded only once for multiple frame integrations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If digital post-processing with high bandwidth memory interface is used for pixel-wise gain and offset corrections, then correction precision is improved, but power consumption and electronics complexity increase significantly
Solution Approach 1:
The patent applies preliminary action by pre-calculating and storing gain and offset correction values in non-volatile memory before image capture. These correction values are loaded into shift registers during camera initialization or factory calibration, eliminating the need for repeated memory access during operation. This preliminary preparation allows immediate application of corrections without real-time computation, significantly reducing power consumption while maintaining correction precision.
Solution Approach 2:
The patent replaces the conventional digital post-processing system with a dedicated analog correction circuit integrated into the ROIC. This circuit uses operational amplifiers and resistors to perform gain and offset corrections in the analog domain before pixel readout. By substituting digital computation with analog circuitry, the system eliminates the need for high-bandwidth memory interfaces and complex digital signal processing, thereby dramatically reducing power consumption and electronics complexity while achieving precise pixel-wise corrections.
2Measurement precision
If digital post-processing with high bandwidth memory interface is used for pixel-wise gain and offset corrections, then correction precision is improved, but device complexity increases significantly
Solution Approach 1:
The patent merges the gain and offset correction functions directly into the ROIC circuitry, combining multiple previously separate functions (analog-to-digital conversion, gain correction, offset correction, and pixel readout) into a single integrated circuit. This integration eliminates the need for separate digital post-processing hardware and high-bandwidth memory interfaces, reducing overall device complexity while maintaining correction precision through dedicated analog correction circuits.
Solution Approach 2:
The patent replaces complex digital post-processing electronics with simpler analog correction circuits using operational amplifiers and resistors. By performing corrections in the analog domain before digitization, the system eliminates the need for complex digital signal processing hardware, high-bandwidth memory interfaces, and associated control logic, thereby significantly reducing electronics complexity while achieving precise pixel-wise corrections.
3Reliability
If conventional digital post-processing is used for gain and offset corrections, then correction functionality is achieved, but power consumption and bandwidth requirements are excessive
Solution Approach 1:
The patent applies preliminary action by pre-loading gain and offset correction values into shift registers during camera initialization or factory calibration. These values remain stored in the registers and are applied continuously during pixel readout without requiring repeated memory access. This preliminary preparation enables immediate application of corrections with minimal power consumption, as the correction values are readily available in on-chip registers rather than requiring ongoing DRAM access.
Solution Approach 2:
The patent replaces power-intensive digital post-processing with low-power analog correction circuits that operate during the pixel readout phase. By performing gain and offset corrections in the analog domain using operational amplifiers and resistors, the system eliminates the need for high-bandwidth memory interfaces and repeated data transfers, thereby dramatically reducing power consumption and bandwidth requirements while maintaining reliable correction functionality.
Data Source
AI summary
A method includes correcting for at least one of gain and offset during frame integration for photodetector events. Gain and offset correction is performed separately in each pixel of a digital read-out integrated circuit (DROIC) for a plurality of corresponding pixels in a photodetector array. First and second binary counters respectively use a gain register and an offset register to implement gain and offset correction.