In-Place DFT Computation Without Output Reordering

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Solution Overview

Problem

Existing DFT, FFT, and DCT computations on processing units face complexity issues due to the need for extra storage or location switching to reorder elements, which increases overall complexity and computation costs.

Innovation Solution

The implementation absorbs the matrix transposing operation into other functions, allowing for in-place DFT, FFT, and DCT computations on modern CPU vector processing units without reordering or shuffling output data, reducing processing cycles and energy consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If extra storage or location switching is used to reorder output elements, then the output elements are properly ordered, but the overall complexity and computation costs increase

Engineering Contradiction:
Improveoutput element orderingVSAvoidoverall complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent combines the reordering operation with the DFT computation itself by using in-place computation and carefully designed data flow. The output elements are generated and stored in their final positions directly during the computation process, merging what would traditionally be separate operations (computation + reordering) into a single integrated process.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent applies preliminary reordering to the input data before computation using bit-reversal permutation. By pre-ordering the input elements according to the required output sequence, the computation can proceed without additional reordering steps, as the data is already in the correct positional relationship for the algorithm.

Inventive Principle:
Principle #10Preliminary action

2Ease of operation

If extra storage is allocated for reordering operations, then output elements can be properly arranged, but memory usage and computation costs increase

Engineering Contradiction:
Improveoutput element arrangementVSAvoidmemory allocation
Core Design Contradiction:
Ease of operationVSQuantity of substance

Solution Approach 1:

The patent implements in-place computation where the algorithm uses the input array itself as the output array. The computation overwrites input elements with output elements directly in their final positions, eliminating the need for separate output storage. The data structure serves itself by being both input and output medium.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent merges the input and output storage spaces into a single array. By using in-place computation with carefully managed data flow and temporary variables, the algorithm performs both reading input and writing output in the same memory location, eliminating the need for duplicate storage allocation.

Inventive Principle:
Principle #5Merging (Combining)

3Ease of operation

If location switching functions are used to reorder elements, then output data is properly ordered, but processing time and computation costs increase

Engineering Contradiction:
Improveoutput data orderingVSAvoidprocessing cycles
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The patent merges the reordering operation with the computational operation by using in-place computation. The same computational passes that transform the data also position it correctly in the output array, eliminating separate reordering passes and reducing total processing cycles.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent performs preliminary bit-reversal permutation on input data before the main computation. This pre-ordering of input elements ensures that subsequent computational steps produce output in the correct order without requiring additional reordering operations, saving processing time.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10853446B2Methods and systems for complexity reduction in discrete Fourier transform computations
Publication Date: 2020.12.01 APPLE INC
  • US10853446B2 patent drawing
  • US10853446B2 patent drawing
  • US10853446B2 patent drawing

AI summary

In one embodiment, a computer-implemented method of discrete Fourier transform (DPT), FFT, or DCT computations on a system comprising a processor is described herein. In one example, the method includes receiving, with the processor, input complex samples from memory of the system, determining input vectors based on the received input complex samples, determining a DFT radix p of p macro blocks based on the input vectors, determining p independent DFT-L vectors based on the p macro blocks with L being based on p, and generating p DFT-N output vectors without reordering or shuffling output data based on the p independent DFT-L vectors.